• Title/Summary/Keyword: bias current

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Sensitivity of an Anisotropic Magnetoresistance Device with Different Bias Conditions

  • Kim, T.S.;Kim, K.C.;Kim, Kibo;K. Koh;Y.J. Song;Song, Y.S.;Suh, S.J.;Kim, Y.S.
    • Journal of Magnetics
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    • v.6 no.1
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    • pp.36-41
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    • 2001
  • A micromagnetic model and a single-domain model simulation programs were used to analyze the sensitivity of a $20\mu m\times 60\mu m \times 1000{\AA}$ permalloy strip as a magnetoresistance sensor with bias fields of various directions and magnitudes. The micromagnetic model agrees with the measured sensitivity data better than the single-domain model. The data show the highest peak sensitivity with the bias field at 90$^{\circ}$to the current. The peak sensitivity decreases and the peak broadens as the bias angle decreases. The simulation using the micromagnetic model shows that a bias angle smaller than 90$^{\circ}$eads to magnetization patterns which are free from closure domains or vertices over a wider range of bias fields.

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Spiking Suppression of Quasi-continuous-wave Pulse Nd:YAG Laser Based on Bias Pumping

  • Chen, Yazheng;Wang, Fuyong
    • Current Optics and Photonics
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    • v.6 no.4
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    • pp.400-406
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    • 2022
  • We numerically demonstrate that the inherent spiking behavior in the quasi-continuous-wave (QCW) operation of an Nd:YAG laser can be suppressed by adopting bias pumping. After spiking suppression, the output QCW pulses from a bias-pumped Nd:YAG laser are very stable, and they can maintain nearly the same temporal shape as that of pump pulse under different pump repetition rates and peak powers. Our study implies that bias pumping is an alternative method of spiking suppression in solid-state lasers, and the application areas of an Nd:YAG laser may be extended by bias pumping.

A Study of Suppression Current for LDMOS under Variation of Temperature (온도변화에 따른 LDMOS의 전류변동 억제에 관한 연구)

  • Jeon, Joong-Sung
    • Journal of Advanced Marine Engineering and Technology
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    • v.30 no.8
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    • pp.901-906
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    • 2006
  • In this paper, the power amplifier using active bias circuits for LDMOS(Lateral Diffused Metal Oxide Semiconductor) MRF-21180 is designed and fabricated. According to change the temperature, the gate voltage of LDMOS is controlled by the fabricated active bias circuits which is made of PNP transistor to suppress drain current. The driving amplifier using MRF-21125 and MRF-21060 is made to drive the LDMOS MRF-21180 power amplifier. The variation of current consumption in the fabricated 60 watt power amplifier has an excellent characteristics of less than 0.1 A, whereas a passive biasing circuit dissipates more than 0.5 A. The implemented power amplifier has the gain over 9 dB, the gain flatness of less than $\pm$0.1 dB and input and output return loss of less than -6 dB over the frequency range 2.11 $\sim$ 2.17 GHz. The DC operation point of this power amplifier at temperature variation 0 $^{\circ}C$ to 60 $^{\circ}C$ is fixed by active bias circuit.

Structure of Ti and Al Films Prepared by Cylindrical Sputtering System (원통형 스퍼터링 장치로 제작한 Ti 및 Al 박막구조)

  • Oh, Chang-Sup;Han, Chang-Suk
    • Korean Journal of Materials Research
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    • v.24 no.7
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    • pp.344-350
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    • 2014
  • Metal films (i.e., Ti, Al and SUH310S) were prepared in a magnetron sputtering apparatus, and their cross-sectional structures were investigated using scanning electron microscopy. The apparatus used consisted of a cylindrical metal target which was electrically grounded, and two anode rings attached to the top and to the bottom of the target. A wire was placed along the center-line of the cylindrical target to provide a substrate. When the electrical potential of the substrate was varied, the metal-film formation rate depended on both the discharge voltage and the electrical potential of the substrate. As we made the magnetic field stronger, the plasma which appeared near the target collected on the plasma wall surface and thereby decreased the bias current. The bias current on the conducting wire was different from that for cation collection. The bias current decreased because the collection of cations decreased when we increased the magnetic-coil current. When the substrate was electrically isolated, the films deposited showed a slightly coarse columnar structure with thin voids between adjacent columns. In contrast, in the case of the grounded substrate, the deposited film did not show any clear columns but instead, showed a densely-packed granular structure. No peeling region was observed between the film and substrate, indicating good adhesion.

Relative Magneto-current of Magnetic Tunnel Transistor with Amorphous n-type Si Film

  • Lee, Sang-Suk;Lee, Jin-Yong;Hwang, Do-Guwn
    • Journal of Magnetics
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    • v.9 no.1
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    • pp.23-26
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    • 2004
  • A magneto-current (MC) was investigated for magnetic tunnel transistor (MTT) with amorphous n-type Si film. A relative MC (more than 49.6%) was observed at an emitter-base bias voltage ($V_{EB}$) of 0.65 V at room temperature. Above a $V_{EB}$ of 0.70 V, however, a rapid decrease in MC was observed in the amorphous Si-based MTT. The collector current increasing and transfer ratio as emitter-base voltage were mainly due to the rapid creation electrons of conduction band states in the Si collector. This approach would make integration in various components and systems easier than a MTT grown on a semiconductor wafer.

Electrical Characteristics of IGBT for Gate Bias under ${\gamma}$ Irradiation (게이트바이어스에서 감마방사선의 IGBT 전기적특성)

  • Lho, Young-Hwan;Lee, Sang-Yong;Kim, Jong-Dae
    • Proceedings of the KIEE Conference
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    • 2008.10b
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    • pp.165-168
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    • 2008
  • The experimental results of exposing IGBT (Insulated Gate Bipolar Transistor) samples to gamma radiation source show shifting of threshold voltages in the MOSFET and degradation of carrier mobility and current gains. At low total dose rate, the shift of threshold voltage is the major contribution of current increases, but for more than some total dose, the current is increased because of the current gain degradation occurred in the vertical PNP at the output of the IGBTs. In the paper, the collector current characteristics as a function of gate emitter voltage (VGE) curves are tested and analyzed with the model considering the radiation damage on the devices for gate bias and different dose. In addition, the model parameters between simulations and experiments are found and studied.

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Drain-current Modeling of Sub-70-nm PMOSFETs Dependent on Hot-carrier Stress Bias Conditions

  • Lim, In Eui;Jhon, Heesauk;Yoon, Gyuhan;Choi, Woo Young
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.17 no.1
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    • pp.94-100
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    • 2017
  • Stress drain bias dependent current model is proposed for sub-70-nm p-channel metal-oxide semiconductor field-effect transistors (pMOSFETs) under drain-avalanche-hot-carrier (DAHC-) mechanism. The proposed model describes the both on-current and off-current degradation by using two device parameters: channel length variation (${\Delta}L_{ch}$) and threshold voltage shift (${\Delta}V_{th}$). Also, it is a simple and effective model of predicting reliable circuit operation and standby power consumption.

Current Control Type Pulse Width Modulation by Using Pair Transistor Circuit (쌍트란지스터 회로에 의한 전류제어형 펄스변조)

  • 오현위
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.8 no.4
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    • pp.7-16
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    • 1971
  • A negative resistance element in the form of current control can be obtained by using a pair transistor circuit. This negative resistance element can be used in the generation of square pulse, and also in the realization of pulse width modulation circuit by superposing signal current on its bias current. The each bias current of pair circuit increases alternatively according to the polarity of the input signal. In order to satisfy this condition, a modified full wave rectification circuit has been adopted for supplying the input signal. Theoritical analysis of pulse times and design guidances for practical modulation circuit parameters are presented.

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A study on the CFT error reduction of switched-current system (전류 스위칭 시스템의 CFT 오차 감소에 관한 연구)

  • 최경진;이해길;신홍규
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.21 no.5
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    • pp.1325-1331
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    • 1996
  • In this paper, a new current-memory circuit is proposed that reduces the clock feedthrough(CFT) error voltage causing total harmonic distortion(THD) increment in switched-current(SI) systems. Using PMOS transistor in CMOS complementary, the proposed one reduces output distortion current due to the CFT errorvoltage. A proposed current-memory is designed using a 1.2.mu.m CMOS process anda 1MHz sinusoidal signal having a 68.mu.A amplitude current is applied as input (sampling frequency:20MHz). It hasbeen shown from the simulation that the output distortion current effected by the CFT error voltage is reduced by approximately 10 times the error voltage of conventional one, THD is -57dB in case ofappling 1kHz frequency input signalwith 0.5 peak signal-to-bias current ratio.

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Effect of Substrate Bias on the Performance of Programming and Erasing in p-Channel Flash Memory (기판 전압이 p-채널 플래쉬 메모리의 쓰기 및 소거 특성에 미치는 영향)

  • 천종렬;김한기;장성준;유종근;박종태
    • Proceedings of the IEEK Conference
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    • 1999.11a
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    • pp.879-882
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    • 1999
  • The effects of the substrate bias on the performance of programming erasing in p-channel flash memory cell have been investigated. It is found that applying positive substrate bias can improve the programming and erasing speed. This improvements can be explained by Substrate Current Induced Hot Electron Injection. From the results, we can confirm that BTB programming method is better in programming and erasing speed than CHE programming method.

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