• Title/Summary/Keyword: bias current

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Empirical Study on Unit Bias under the Flat Rate Pricing in the Korean Mobile Telecommunication Market (이동통신시장에서의 단위편향 소비행태 발생에 관한 실증연구)

  • Lee, Sang-Woo;Jeong, Seon-Hwa;Lee, Hyeongjik
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.41 no.2
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    • pp.229-237
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    • 2016
  • The purpose of this paper is to empirically identify whether unit bias exists or not under the flat rate pricing in the Korean mobile telecommunication market and to give the desirable form of pricing plans for minimizing this irrational behaviors. Our results show that with the flat rate pricing consumers tends to make more voice or data traffic over their optimal consumption level, meaning the existence of unit bias in the Korean mobile market. These results imply that under the current pricing plans subscribers may pay higher monthly fee than their optimal cost which maximizes their utility, for using the telecommunications service. Thus, policy makers need to consider adopting mobile operators' segmentation of the flat rate pricing plans for the reduction of subscribers' telecommunications costs and the improvement of consumer welfare.

Operational Characteristics of Superconducting Amplifier using Vortex Flux Flow

  • Lim, Sung-Hun
    • Transactions on Electrical and Electronic Materials
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    • v.9 no.6
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    • pp.260-264
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    • 2008
  • The operational characteristics of superconducting amplifier using vortex flux flow were analyzed from an equivalent circuit in which its current-voltage characteristics for the vortex motion in YBCO microbridge were reflected. For the analysis of operation as an amplifier, dc bias operational point for the superconducting amplifier is determined and then ac operational characteristics for the designed superconducting amplifier were investigated. The variation of transresistance, which describes the operational characteristics of superconducting amplifier, was estimated with respect to conditions of dc bias. The current and the voltage gains, which can be derived from the circuit for small signal analysis, were calculated at each operational point and compared with the results obtained from the numerical analysis for the small signal circuit. From our paper, the characteristics of amplification for superconducting flux flow transistor (SFFT) could be confirmed. The development of the superconducting amplifier applicable to various devices is expected.

Analysis of Schottky Barrier Height in Small Contacts Using a Thermionic-Field Emission Model

  • Jang, Moon-Gyu;Lee, Jung-Hwan
    • ETRI Journal
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    • v.24 no.6
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    • pp.455-461
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    • 2002
  • This paper reports on estimating the Schottky barrier height of small contacts using a thermionic-field emission model. Our results indicate that the logarithmic plot of the current as a function of bias voltage across the Schottky diode gives a linear relationship, while the plot as a function of the total applied voltage across a metal-silicon contact gives a parabolic relationship. The Schottky barrier height is extracted from the slope of the linear line resulting from the logarithmic plot of current versus bias voltage across the Schottky diode. The result reveals that the barrier height decreases from 0.6 eV to 0.49 eV when the thickness of the barrier metal is increased from 500 ${\AA}$ to 900 ${\AA}$. The extracted impurity concentration at the contact interface changes slightly with different Ti thicknesses with its maximum value at about $2.9{\times}10^{20}\;cm^{-3}$, which agrees well with the results from secondary ion mass spectroscopy (SIMS) measurements.

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A Study on the Development of Active Hybrid Bearing (능동 복합 베어링 개발)

  • Park J.H.;Sim P.S.;Park C.H.;Lee T.Y.
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 2005.06a
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    • pp.269-275
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    • 2005
  • This article describes the development on a new style active hybrid bearing system including both merits of an aerostatic bearing system and a magnetic bearing system. The developed active hybrid bearing system has several advantages: exact rotation, robust controller against the variation of a disturbance, improvement of stiffness and a damper of the system at a high-speed operation, and constraints of the heat generated by a bias current. In order to measure a rotating error due to the change of a cutting force and the variation of a system parameter, a CCS (Cylindrical Capacity displacement Sensor) was used.

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N-Type Carbon-Nanotube MOSFET Device Profile Optimization for Very Large Scale Integration

  • Sun, Yanan;Kursun, Volkan
    • Transactions on Electrical and Electronic Materials
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    • v.12 no.2
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    • pp.43-50
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    • 2011
  • Carbon-nanotube metal oxide semiconductor field effect transistor (CN-MOSFET) is a promising future device candidate. The electrical characteristics of 16 nm N-type CN-MOSFETs are explored in this paper. The optimum N-type CN-MOSFET device profiles with different number of tubes are identified for achieving the highest on-state to off-state current ratio ($I_{on}/I_{off}$). The influence of substrate voltage on device performance is also investigated in this paper. Tradeoffs between subthreshold leakage current and overall switch quality are evaluated with different substrate bias voltages. Technology development guidelines for achieving high-speed, low-leakage, area efficient, and manufacturable carbon nanotube integrated circuits are provided.

Low-Cost High-Efficiency PDP Sustaining Driver with a Resonance Bias Level Shift

  • Park, Kyung-Hwa;Yi, Kang-Hyun
    • Journal of Power Electronics
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    • v.13 no.5
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    • pp.779-786
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    • 2013
  • A highly efficient sustaining driver is proposed for plasma display panels (PDPs). When the PDP is charged and discharged, the proposed sustaining driver employs an address voltage source used in an addressing period. A voltage source is used for fully charging the panel to the sustaining voltage, and an initial inductor current helps the panel discharge to 0 V. The resonance between the panel and an inductor is made by shifting the voltage and current bias level when charging and discharging the panel. As a result, the proposed circuit can reduce power consumption, switching loss, heat dissipation, and production cost. Experimental results of a 42-inch PDP are provided to verify the operation and features of the proposed circuit.

Electrical stabilities of half-Corbino thin-film transistors with different gate geometries

  • Jung, Hyun-Seung;Choi, Keun-Yeong;Lee, Ho-Jin
    • Journal of Information Display
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    • v.13 no.1
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    • pp.51-54
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    • 2012
  • In this study, the bias-temperature stress and current-temperature stress induced by the electrical stabilities of half-Corbino hydrogenated-amorphous-silicon (a-Si:H) thin-film transistors (TFTs) with different gate electrode geometries fabricated on the same substrate were examined. The influence of the gate pattern on the threshold voltage shift of the half-Corbino a-Si:H TFTs is discussed in this paper. The results indicate that the half-Corbino a-Si:H TFT with a patterned gate electrode has enhanced power efficiency and improved aperture ratio when compared with the half-Corbino a-Si:H TFT with an unpatterned gate electrode and the same source/drain electrode geometry.

Fabrication and Characterization of Power AlGaAs/InGaAs double channel P-HEMTs for PCS applications (PCS용 전력 AlGaAs/InGaAs 이중 채널 P-HEMTs의 제작과 특성)

  • 이진혁;김우석;정윤하
    • Proceedings of the IEEK Conference
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    • 1999.11a
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    • pp.295-298
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    • 1999
  • AlGaAs/InGaAs power P-HEMTS (Pseudo-morphic High Electron Mobility Transistors) with 1.0-${\mu}{\textrm}{m}$ gate length for PCS applications have been fabricated. We adopted single heterojunction P-HEMT structure with two Si-delta doped layer to obtain higher current density. It exhibits a maximum current density of 512㎃/mm, an extrinsic transconductance of 259mS/mm, and a gate to drain breakdown voltage of 12.0V, respectively. The device exhibits a power density of 657㎽/mm, a maximum power added efficiency of 42.1%, a linear power gain of 9.85㏈ respectively at a drain bias of 6.0V, gate bias of 0.6V and an operation frequency of 1.765㎓.

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Feasibility Study of Non-volatile Memory Device Structure for Nanometer MOSFET (나노미터 MOSFET비휘발성 메모리 소자 구조의 탐색)

  • Jeong, Ju Young
    • Journal of the Semiconductor & Display Technology
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    • v.14 no.2
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    • pp.41-45
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    • 2015
  • From 20nm technology node, the finFET has become standard device for ULSI's. However, the finFET process made stacking gate non-volatile memory obsolete. Some reported capacitor-less DRAM structure by utilizing the FBE. We present possible non-volatile memory device structure similar to the dual gate MOSFET. One of the gates is left floating. Since body of the finFET is only 40nm thick, control gate bias can make electron tunneling through the floating gate oxide which sits across the body. For programming, gate is biased to accumulation mode with few volts. Simulation results show that the programming electron current flows at the interface between floating gate oxide and the body. It also shows that the magnitude of the programming current can be easily controlled by the drain voltage. Injected electrons at the floating gate act similar to the body bias which changes the threshold voltage of the device.

Development of the CuN/Cu/CuN type Electrode Material for the PDP (PDP용 CuN/Cu/CuN 전극재료의 개발에 관한 연구)

  • 성열문;정신수;류재하;김재성;조정수;박정후
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 1996.05a
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    • pp.55-58
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    • 1996
  • A new type CuN/Cu/CuN thin film electrode material with high adhesion to glass was developed by the dc reactive planar magnetron sputtering system for the PDP(Plasma Display Panel). The adhesive force of the CuxN thin film was in the range of 20∼40(N) under the conditions of the N$_2$ partial pressure of 15%, discharge current of 70mA, discharge voltage of 450v and substrate bias voltage of -100V. The adhesive force was depended on the N$_2$ partial Pressure, discharge current and substrate bias voltage.

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