• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.11
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• pp.56-65
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• 2009

As increasing the number of IPs integrated in a single chip and requiring high communication bandwidth on a chip, the trend of SoC communication architecture is changed from bus- or crossbar-based architecture to packet switched network architecture, NoC. However, highly complex control logics in routers require multiple cycles to switch packet. In this paper, we design low complex router to improve the communication latency. Our NoC design is verified by simulation platform modeled by ESL tool, SoC Designer. We also evaluate our NoC design comparing to the previous NoC architecture based on VC router. Our results show that our NoC architecture has less communication latency, even small throughput degradation (about 1-2%).

• 전자공학회논문지 IE
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• v.43 no.2
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• pp.80-86
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• 2006

The wireless communication based on LDPC and adaptive spatial-subcarrier coded modulation using MQAM for orthogonal frequency division multiplexing (OFDM) wireless transmission by using instantaneous channel state information and employing multiple antennas at both the transmitter and the receiver. Adaptive coded modulation is a promising idea for bandwidth-efficient transmission on time-varying, narrowband wireless channels. On power limited Additive White Gaussian Noise (AWGN) channels, low density parity check (LDPC) codes are a class of error control codes which have demonstrated impressive error correcting qualities, under some conditions performing even better than turbo codes. The paper demonstrates OFDM with LDPC and adaptive modulation applied to Multiple-Input Multiple-Output (MIMO) system. An optimization algorithm to obtain a bit and power allocation for each subcarrier assuming instantaneous channel knowledge is used. The experimental results are shown the potential of our proposed system.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.16 no.2 s.93
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• pp.154-160
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• 2005

Microwave Otters are essential device in modem wireless systems. A compact dimension BPF(Band-pass Filter) for IEEE 802.11a WLAN service is realized using LTCC multi-layer process. To extrude 2-stage band-pass equivalent circuit, band-pass and J-inverter transform applied to Chebyshev low-pass prototype filter. Because parallel L-C resonator is complicate and hard to control the inductor characteristics in high frequency, the shorted $\lambda/4$ stripline is selected for the resonator structure. The passive element is located in the different layers connected by conventional via structure and isolated by inner GND. The dimension of fabricated stacked band-pass filter which is composed of six layers, is $2.51\times2.27\times1.02\;mm^3$. The measured filter characteristics show the insertion loss of -2.25 dB, half-power bandwidth of 220 MHz, attenuation at 5.7 GHz of -32.25 dB and group delay of 0.9 ns at 5.25 GHz.

• Proceedings of the KSPS conference
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• 2007.05a
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• pp.152-154
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• 2007

Submucosal type cleft palate is subdivision of cleft palate. Because of late detection, the treatment - for example, the operation or the speech therapy - for the submucosal type cleft palate patient usually late. In this study, we want to find the objective characteristics of submucosal type cleft palate patient, comparing with the normal and the complete cleft palate patient. Experimental groups are 10 submucosal type cleft palate patients who got the operation in our hospital, 10 complete cleft palate patients. And, 10 normals as control group. The sentence patterns using in this study is simple 5 vowels. Using CSL program we evaluate the Formant, Bandwidth. We analized the spectral characteristics of speech signals of 3 groups, before and after the operation.

• Transactions of the Korean Society of Mechanical Engineers A
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• v.35 no.5
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• pp.479-485
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• 2011

To acquire images in a thermionic-scanning electron-beam system, a scanning unit is needed to control the electron beam emitted from the tungsten filament source. In scanning the electron beam on the solid surface, the signalto-noise ratio depends on the scanning frequency. We used a digital filter to reduce noise by analyzing the real-time frequency of a secondary electron signal. The noise and the true image signal were well separated. We designed the digital filter via a DSP floating-point operation, and the noise elimination resulted in enhanced image quality in a highresolution mode.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.11 no.12
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• pp.5835-5854
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• 2017

The implementation of IEEE 802.15.6 in Wireless Body Area Network (WBAN) is contention based. Meanwhile, IEEE 802.15.4 MAC provides limited 16 channels in the Superframe structure, making it unfit for N heterogeneous nature of patient's data. Also, the Beacon-enabled Carrier-Sense Multiple Access/Collision-Avoidance (CSMA/CA) scheduling access scheme in WBAN, allocates Contention-free Period (CAP) channels to emergency and non-emergency Biomedical Sensors (BMSs) using contention mechanism, increasing repetition in rounds. This reduces performance of the MAC protocol causing higher data collisions and delay, low data reliability, BMSs packet retransmissions and increased energy consumption. Moreover, it has no traffic differentiation method. This paper proposes a Low-delay Traffic-Aware Medium Access Control (LTA-MAC) protocol to provide sufficient channels with a higher bandwidth, and allocates them individually to non-emergency and emergency data. Also, a Contention Differentiated Adaptive Slot Allocation CSMA-CA (CDASA-CSMA/CA) for scheduling access scheme is proposed to reduce repetition in rounds, and assists in channels allocation to BMSs. Furthermore, an On-demand (OD) slot in the LTA-MAC to resolve the patient's data drops in the CSMA/CA scheme due to exceeding of threshold values in contentions is introduced. Simulation results demonstrate advantages of the proposed schemes over the IEEE 802.15.4 MAC and CSMA/CA scheme in terms of success rate, packet delivery delay, and energy consumption.

• IEMEK Journal of Embedded Systems and Applications
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• v.12 no.4
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• pp.193-204
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• 2017

Various 3D-stacked DRAMs have been proposed to overcome the memory wall problem. Hybrid Memory Cube (HMC) is a true 3D-stacked DRAM with stacked DRAM layers on top of a logic layer. The logic die is mainly used to implement a memory controller for HMC, and it is connected through a high speed serial link called SerDes with a host that is either a processor or another HMC. In HMC, the serial link is crucial for both performance and power consumption. Therefore, it is important that the link is configured properly so that the required performance should be satisfied while the power consumption is minimized. In this paper, we propose a HMC system model included the high speed serial link to estimate performance accurately. Since the link modeling strictly follows the link flow control mechanism defined in the HMC spec, the actual HMC performance can be estimated accurately with respect to each link configuration. Various simulations are conducted in order to deduce the correlation between the HMC performance and the link configuration with regard to memory utilization. It is confirmed that there is a strong correlation between the achievable maximum performance of HMC and the link configuration in terms of both bandwidth and latency. Therefore, it is possible to find the best link configuration when the required HMC performance is known in advance, and finding the best configuration will lead to significant power saving while the performance requirement is satisfied.

• Journal of the Korea Society of Computer and Information
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• v.19 no.1
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• pp.77-84
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• 2014

In this paper, we propose the hierarchical network synchronization scheme that is backward compatible for the existing commercial system, efficient for total system performance, and whose hardware modification is minimized. This system performance is, the relationship among bandwidth efficiency, complexity and MODEM performance, and superiority of network system applicability. The proposed structure can remedy the high hardware complexity and the lower accuracy of network sychronization that the existing satellite communication terminal system in the star network based on TDM/MF-TDMA of DVB-S2/RCS standards has. Besides, It has high efficiency in view of cost and system performance if the system designed for satellite broadcast requires system upgrade. In the body section, its hardware complexity and system performance of the proposed algorithm is analysed theoretically and treated with the related parameters(symbol rate, spreading factor, etc.) and the BER performance of control channel through the computer simulation for its verification that it can be applied for communications system.

• Journal of the Korea Convergence Society
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• v.9 no.9
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• pp.47-52
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• 2018

Wi-Fi enabled Internet of Things (IoTs) had a substantial impact on society, economy and industry. However wireless connectivity technologies in unlicensed band such as Wi-Fi are vulnerable to interferences. They also face difficulty providing wireless connectivity over long range in dense networks due to the dynamically changed interference effect and asymmetric interference conditions. In this paper, robust acknowledgement transmission scheme is proposed for long range IoTs. According to the proposed scheme, it is possible to control the transmission rate of the transmission success rate of the response frame by adjusting the transmission rate of the response frame when the interference is present asymmetrically. It is also possible to use higher data rate when high quality link is guaranteed. The evaluation results demonstrated the proposed scheme improves the aggregate throughput by at most 9 Mbps when 20 MHz bandwidth transmission mode was adopted.

• Journal of IKEEE
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• v.14 no.1
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• pp.33-39
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• 2010

In this paper, a 5Gb/s receiver with an adaptive equalizer for serial link interfaces is proposed. For effective gain control, a least-mean-square (LMS) algorithm was implemented with two internal signals of slicers instead of output node of an equalizing filter. The scheme does not affect on a bandwidth of the equalizing filter. It also can be implemented without passive filter and it saves chip area and power consumption since two internal signals of slicers have a similar DC magnitude. The proposed adaptive equalizer can compensate up to 25dB and operate in various environments, which are 15m shield-twisted pair (STP) cable for DisplayPort and FR-4 traces for backplane. This work is implemented in $0.18-{\mu}m$ 1-poly 4-metal CMOS technology and occupies $200{\times}300{\mu}m^2$. Measurement results show only 6mW small power consumption and 2Gbps operating range with fabricated chip. The equalizer is expected to satisfy up to 5Gbps operating range if stable varactor(RF) is supported by foundry process.