• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.11a
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• pp.55-55
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• 2009

Silicon Carbide (SiC) is a material with a wide bandgap (3.26eV), a high critical electric field (~2.3MV/cm), a and a high bulk electron mobility (${\sim}900cm^2/Vs$). These electronic properties allow high breakdown voltage, high frequency, and high temperature operation compared to Silicon devices. Although various SiC DMOSFET structures have been reported so far for optimizing performances. the effect of channel dimension on the switching performance of SiC DMOSFETs has not been extensively examined. In this paper, we report the effect of the interface states ($Q_s$) on the transient characteristics of SiC DMOSFETs. The key design parameters for SiC DMOSFETs have been optimized and a physics-based two-dimensional (2-D) mixed device and circuit simulator by Silvaco Inc. has been used to understand the relationship with the switching characteristics. To investigate transient characteristic of the device, mixed-mode simulation has been performed, where the solution of the basic transport equations for the 2-D device structures is directly embedded into the solution procedure for the circuit equations. The result is a low-loss transient characteristic at low $Q_s$. Based on the simulation results, the DMOSFETs exhibit the turn-on time of 10ns at short channel and 9ns at without the interface charges. By reducing $SiO_2/SiC$ interface charge, power losses and switching time also decreases, primarily due to the lowered channel mobilities. As high density interface states can result in increased carrier trapping, or recombination centers or scattering sites. Therefore, the quality of $SiO_2/SiC$ interfaces is important for both static and transient properties of SiC MOSFET devices.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.9 no.3
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• pp.576-581
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• 2005

In this paper. the a-Si:H TFT using ferroelectric of $SrTiO_3$ as a gate insulator is fabricated on glass. High k gate dielectric is required for on-current, threshold voltage and breakdown characteristics of TFT Dielectric characteristics of ferroelectric are superior to $SiO_2$ and $Si_3N_4$. Ferroelectric increases on-current and decreases threshold voltage of TFT and also ran improve breakdown characteristics.$SrTiO_4$ thin film is deposited by e-beam evaporation. Deposited films are annealed for 1 hour in N2 ambient at $150^{\circ}C\~600^{\circ}C$. Dielectric constant of ferroelectric is about 60-100 and breakdown field is about IMV/cm. In this paper, the TFT using ferroelectric consisted of double layer gate insulator to minimize the leakage current. a-SiN:H, a-Si:H (n-type a-Si:H) are deposited onto $SrTiO_3$ film to make MFNS(Metal/ferroelectric/a-SiN:H/a-Si:H) by PECVD. In this paper, TFR using ferroelectric has channel length of$8~20{\mu}m$ and channel width of $80~200{\mu}m$. And it shows that drain current is $3.4{\mu}A$at 20 gate voltage, $I_{on}/I_{off}$ is a ratio of $10^5\~10^8,\;and\;V_{th}$ is$4\~5\;volts$, respectively. In the case of TFT without having ferroelectric, it indicates that the drain current is $1.5{\mu}A$ at 20gate voltage and $V_{th}$ is $5\~6$ volts. If properties of the ferroelectric thin film are improved, the performance of TFT using this ferroelectric thin film can be advanced.

• Korean Chemical Engineering Research
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• v.48 no.5
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• pp.654-659
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• 2010

We have investigated the effect of rubrene-doped CuPc hole transport layer on the performance of p-i-n type bulk hetero-junction photovoltaic device with a structure of ITO/PEDOT:PSS/CuPc: rubrene/CuPc:C60(blending ratio 1:1)/C60/BCP/Al and have evaluated the current density-voltage(J-V) characteristics, short-circuit current($J_{sc}$), open-circuit voltage($V_{oc}$), fill factor(FF), and energy conversion efficiency(${\eta}_e$) of the device. By rubrene doping into CuPc hole transport layer, absorption intensity in absorption spectra decreased. However, the performance of p-i-n organic type bulk hetero-junction photovoltaic device fabricated with crystalline rubrene-doped CuPc was improved since rubrene shows higher bandgap and hole mobility compared to CuPc. Increased injection currents have effected on the performance improvement of the present device with energy conversion efficiency(${\eta}_e$) of 1.41%, which is still lower value compared to silicone solar cell and many efforts should be made to improve organic photovoltaic devices.

• Korean Journal of Optics and Photonics
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• v.20 no.4
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• pp.211-216
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• 2009

Much research into two-dimensional (2-D) photonic crystal (PC) structures has been conducted for realization of ultrasmall optical integrated circuits. A 2-D silicon (Si) PC slab structure with air cladding (n=1) is one of the representative structures in 2-D PCs. While air-clad Si PC slab structures have good optical characteristics, their suspension in air can lead to mechanical weakness, making integration with some optical devices difficult. In this paper, we propose improving the mechanical robustness of PC structure by developing a 2-D Si PC structure with symmetric silica cladding (n=1.44) and comparing its optical properties to that of the air-clad structure. First, we investigate the optical properties of a 2-D Si PC slab structure with air cladding by using a 3-D finite difference time domain method. We determined that a photonic bandgap of 330 nm and a non-leaky propagating bandwidth of 100 nm in the optical communication range are possible. Next, we investigate the optical properties of 2-D Si PC slab structures with silica cladding. Even though the refractive index of the silica cladding is higher than that of air, we developed a silica-clad structure with good optical properties: a photonic band gap of approximately 230 nm and a non-leaky propagating bandwidth of 90 nm, comparable to that of the air-clad PC structures.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.10 no.6
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• pp.418-424
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• 2000

Pure $TiO_2$and 10 mol % Pb-doped $TiO_2(Pb_xTi_{1-x}O_2$(x = 0.1)) powder and thin films have been prepared by the sol-gel method. Titanium isopropoxide and ethanol are used for pure $TiO_2$, lead acetate trihydrate and titanium triisopropoxide monoacethylacetonate are used for Pb-doped $TiO_2$, respectively. Films are coated on p-type Si(100) wafer and ITO glass substrates by the sol-gel spin-coating method. The powder and multi-coated films are annealed at different temperature (400~$800^{\circ}C$) for phase formation and crystallization. TGA/DTA, XRD analysis, SEM and UV-visible transmission spectroscopy have been used to study the characteristics of the powder and films. XRD results show that the films are polycrystalline, anatase type and oriented predominantly to the A(101) plane. A slight shift in the d-spacing for the Pb-doped film indicates the incorporation of the Pb into $TiO_2$lattice. A shift of the absorption wavelength in the transmission spectrum towards longer wavelength has been observed about $Pb_xT_{1-x}O_2$(x = 0.1) thin film, which indicates a decrease in the bandgap of $TiO_2$upon Pb-doping.

• Journal of the Korean Electrochemical Society
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• v.18 no.1
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• pp.17-23
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• 2015

$Li_4Ti_5O_{12}$ (LTO) have attracted much attention of researchers in the field of energy storage, because of their excellent stability for electric vehicle application. A main drawback of LTO is however their insulating nature due to the wide bandgap, which should be addressed to enhance the battery performance. In this study, we investigated the effect of water solubility of dopant precursor on the electrochemical characteristics of conducting LTO prepared by doping with $Cr^{3+}$ ions with the well-known wet-mixing method. The solubility of dopant precursor directly affected the morphology and the phase of doped LTO, and therefore their battery performance. In the case of employing the most soluble dopant precursor, $Cr(NO_3)_2$, the doped LTO demonstrated a markedly enhanced discharge capacity at high C-rate (130mAh/g @ 10C), which is about 2 times higher value than that of bare LTO.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.9 s.339
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• pp.1-8
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• 2005

A $0.35\mu$m SiGe BiCMOS fabrication process has been timely developed, which is aiming at wireless RF ICs development and fast growing SiGe RF market. With non-selective SiGe epilayer, SiGe HBTs in this process used trapezoidal Ge base profile for the enhanced AC performance via Ge induced bandgap niuoin. The characteristics of hFE 100, $f_{T}\;45GHz,\;F_{max}\;50GHz,\;NF_{min}\;0.8dB$ have been obtained by optimizing not only SiGe base profile but also RTA condition after emitter polysilicon deposition, which enables the SiGe technology competition against the worldwide cutting edge SiGe BiCMOS technology. In addition, the process incorporates the CMOS logic, which is fully compatible with $0.35\mu$m pure logic technology. High Q passive elements are also provided for high precision analog circuit designs, and their quality factors of W(1pF) and inductor(2nH) are 80, 12.5, respectively.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.08a
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• pp.170-170
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• 2010

Thin-film transistors (TFT) have become the key components of electronic and optoelectronic devices. Most conventional thin-film field-effect transistors in display applications use an amorphous or polycrystal Si:H layer as the channel. This silicon layers are opaque in the visible range and severely restrict the amount of light detected by the observer due to its bandgap energy smaller than the visible light. Therefore, Si:H TFT devices reduce the efficiency of light transmittance and brightness. One method to increase the efficiency is to use the transparent oxides for the channel, electrode, and gate insulator. The development of transparent oxides for the components of thin-film field-effect transistors and the room-temperature fabrication with low voltage operations of the devices can offer the flexibility in designing the devices and contribute to the progress of next generation display technologies based on transparent displays and flexible displays. In this thesis, I report on the dc performance of transparent thin-film transistors using amorphous indium tin zinc oxides for an active layer. $SiO_2$ was employed as the gate dielectric oxide. The amorphous indium tin zinc oxides were deposited by RF magnetron sputtering. The carrier concentration of amorphous indium tin zinc oxides was controlled by oxygen pressure in the sputtering ambient. Devices are realized that display a threshold voltage of 4.17V and an on/off ration of ${\sim}10^9$ operated as an n-type enhancement mode with saturation mobility with $15.8\;cm^2/Vs$. In conclusion, the fabrication and characterization of thin-film transistors using amorphous indium tin zinc oxides for an active layer were reported. The devices were fabricated at room temperature by RF magnetron sputtering. The operation of the devices was an n-type enhancement mode with good saturation characteristics.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.14 no.5
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• pp.438-443
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• 2021

This paper uses a multiplex deposition sputter system and aims to improve transmittance and reduce production costs by depositing a CdS thin film on an ITO glass substrate. When manufacturing CdS thin films, we wanted to find excellent conditions when manufacturing solar cells by changing heat treatment time. It was observed that thickness and sheet resistance were not significantly different depending on heat treatment time changes. The specific resistance was measured from a minimum of 6.68 to a maximum of 6.98. When the heat treatment time was more than 20 minutes, the transmittance was measured to be more than 75%. When the heat treatment time was 10 minutes, the bandgap was 3.665 eV and more than 20 minutes was 3.713 eV, which was measured as the same result. The XRD analysis showed that the structure of CdS was hexagonal and only CdS thin films were deposited without any other impurities. The result of calculating the FWHM was a maximum of 0.142 when the heat treatment time was 20 minutes, and a minimum of 0.133 when the heat treatment time was 40 minutes, so there was no significant difference in the FWHM when the heat treatment time was changed. The particle size was measured at 11.65 Å when the heat treatment time was 40 minutes, and at 10.93 Å when the heat treatment time was 20 minutes.

• Applied Chemistry for Engineering
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• v.33 no.2
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• pp.159-165
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• 2022

To enhance the photocatalytic activities of WO₃ photocatalysts, fluorine doping was performed to induce the oxygen vacancies. Both plasma and direct vaper fluorination were carried out for fluorine doping, and photocatalytic activities were examined by using methylene blue dye. Oxygen vacancies of the plasma and direct vaper fluorinated WO₃ photocatalysts were measured to be 14.65 and 18.59%, which increased to about 23 and 56% at pristine WO₃ photocatalysts. The degradation efficiency of methylene blue was also determined about 1.7 and 3.4 times higher than pristine WO₃ photocatalysts, respectively, depending on oxygen vacancies increased. In addition, it was confirmed that the bandgap process energy decreased from 2.95 eV to 2.64 and 2.45 eV after fluorine doping. From this result, it is considered that the direct vaper fluorination has an advantage for increasing the photocatalytic activities of WO₃ compared to that of the plasma fluorination.