• Proceedings of the KIEE Conference
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• 2006.10d
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• pp.129-131
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• 2006

This paper presents a new ZVS-PWM high frequency inverter. The ZVS operation is achieved in the whole load range by using a simple auxiliary reverse blocking switch in parallel with series resonant capacitor. The operating principle and the operating characteristics of the new high frequency circuit treated here are illustrated and evaluated on the basis of simulation results. It was examined that the complete soft switching operation can be achieved even for low power setting ranges by introducing the high frequency dual duty cycle control scheme. In the proposed high frequency inverter treated here, the dual mode pulse modulation control strategy of the asymmetrical PWM in the higher power setting ranges and the lower power setting ones, the output power of this high frequency inverter could introduce in order to extend soft switching operation ranges. Dual duty cycle is used to provide a wide range of output power regulation that is important in many high frequency inverter applications. It is more suitable for induction heating applications the operation and control principle of the proposed high frequency inverter are described and verified through simulated results.

• The Transactions of the Korean Institute of Power Electronics
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• v.10 no.5
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• pp.518-525
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• 2005

The paper proposes a novel ZVZCS PWM converter. It enables the main switch to be turned on/off with both zero voltage and zero current, the auxiliary switch to be turned on/off with ZCS, the rectifier diode to be turned on/off with ZVS. Moreover, this proposed soft switching technique is suitable for not only minority carrier device but also majority carrier semiconductor device. Since auxiliary resonant circuit of the proposed boost converter is placed out of the main power path, therefore, there are no voltage and current stresses on the main switch and diode. The operation of the proposed boost converter is explained and analyzed theoretical and experimentally, from a prototype operating at 100KHz.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.67 no.2
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• pp.82-89
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• 2018

This paper presents a novel prototype of dual mode control based phase shift ZVS PWM high frequency load resonant inverter with lossless snubber capacitors in addition to a single active auxiliary resonant snubber for electromagnetic induction heating(IH) foam metal based consumer fluid dual packs(DPA) heater. The operating principle in steady state and unique features of this voltage source soft switching high frequency inverter circuit topology are described in this paper. The lossless snubber and auxiliary active resonant snubber assisted constant frequency phase shift ZVS PWM high frequency load resonant inverter employing IGBT power modules actually is capable of achieving zero voltage soft commutation over a widely specified power regulation range from full power to low power. The steady state operating performances of this dual mode phase shift PWM series load resonant high frequency inverter are evaluated and discussed on the basis of simulation and experimental results for induction heated foam metal heater which is designed for compact and high efficient moving fluid heating appliance in the consumer pipeline systems.

• KIEE International Transaction on Electrical Machinery and Energy Conversion Systems
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• v.2B no.3
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• pp.133-139
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• 2002

In this paper, a prototype of an active auxiliary quasi-resonant DC link (QRDCL) snubber assisted voltage source bidirectional power converter (AC to DC and DC to AC) operating at zero voltage soft-switching (BVS) PWM nlode is presented for a Battery Energy Storage System (BESS). The operating principle of this QRDCL circuit and multifunctional control-based converter system, including PWM inverter mode in which energy flows from the battery bank to the three-phase utility-grid in addition to an active PWM converter mode in which energy flows from the utility-grid to the battery banks are described respectively by the control implementation on the basis of d-q coordinate plane transformation. The multifunctional operation characteristics of this three-phase ZVS PWM bi-directional converter with QRDCL is demonstrated fer a BESS under the power conditioning and processing schemes of energy supply mode and energy storage mode, and compared with a conventional three-phase hard switching PWM bi-directional converter for a BESS. The effectiveness of the three-phase ZVS PWM hi-directional converter with QRDCL is proven via the simulation analysis.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.50 no.5
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• pp.238-245
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• 2001

During an AC motor's start-up accelerating period, a large amount of current is required to reach to the rating speed. This is called in-rush current. This peak in-rush current can be more than about several times the operating or steady-state current in the full load rating of the motor. In-rush current is present in both and electronic ballasts. The main area of concern is the tripping of circuit breaker and fuses which can affect electrical system components From this, we can see that the electrical power controllers will be rather concerned, since they have to supply the actual current necessary to start the motor. This paper presents a new method to reducing in-rush current and energy saving of the single-phase induction motor used in air-conditioner. It can be obtained that proposed system is low cost and small size as compared with other controller. Experiments are focused on a capacitor starting single-phase induction motor. The optimal power saving and in-rush current limiting by phase angle control are verified by experimental results. Also, auxiliary winding was controlled by electronic starting switch.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.65 no.5
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• pp.878-882
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• 2016

These days, SFCLs are being developed in order to limit fault current. However, the superconducting elements that limit the fault current have such problems as capacity increase and require auxiliary devices including cooling device. If devices that comprise the current power network can withstand fault current for at least one cycle, it is possible to limit the fault current with current limiting elements by bypassing it on the fault line. In this study, the fault current limiter was configured with current transformer, vacuum interrupter, and current limiting element. Through the experience, it was confirmed that the fault current was limited within one cycle. The superconducting element, as a current limiting element, limited the fault current by 80 % within one cycle from fault occurrence, and the passive element limited it more than 95 %. Also, through the comparison between resistance curve and power consumption curve, it was confirmed that the current limiting element using a passive element was more stable than the superconducting element that required capacity increase and other auxiliary devices. It was considered that the FCL proposed in this study could limit fault current stably within one cycle from fault occurrence by using the existing power technologies such as fault current detection and solenoid valve operating circuit.

• Journal of Power Electronics
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• v.17 no.4
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• pp.923-932
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• 2017

This paper proposes a novel scheme which can compensate the common-mode voltage (CMV) for five-level active neutralpoint clamped (5L-ANPC) inverters, which is based on modifying the space vector pulse width modulation (SVPWM) and adding an auxiliary leg to the inverter. For the modified SVPWM, only the 55 voltage vectors producing low CMV values among the 125 possible voltage vectors are utilized, which varies over the three voltage levels of $-V_{dc}/12$, 0 V, and $V_{dc}/12$. In addition, the compensating voltage, which is injected into the 5L-ANPC inverter system to cancel the remaining CVM through a common-mode transformer (CMT) is generated by the additional NPC leg. By the proposed method, the CMV of the inverter is fully eliminated, while the utilization of the DC-link voltage is not decreased at all. Furthermore, all of the DC-link and flying capacitor voltages of the inverter are well controlled. Simulation and experimental results have verified the validity of the proposed scheme.

• Proceedings of the KIPE Conference
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• 2001.10a
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• pp.193-197
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• 2001

This paper presents a novel circuit topology of the double two-switch forward type high frequency transformer linked soft-switching PWM DC-DC power converter with tapped inductor filters that can operate under a condition of the low peak voltage stress across the power semiconductor devices and lowered peak current stress through the transformer for some high power applications. This circuit topology of an interleaved two-switch forward soft-switching power converter is proposed in the order to minimize an idle circulating current due to the tapped inductor filter without of any additional active auxiliary resonant-assisted snubber circuits, such as active resonant DC link snubbers and AC link snubbers, active resonant commutation leg link snubbers. The unique advantages of this power converter are less power circuit components and power semiconductor devices, constant frequency PWM scheme, cost effective configuration and wider soft-switching PWM operation range under PWM power regulations load variations. The practical effectiveness of the proposed soft-switching converter circuit topology is tested by simulations and is proved by experimental results received from the 500W-100kHz breadboard setup.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.37 no.3
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• pp.44-54
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• 2000

In this paper, a design methodology for the frequency-adaptive negative-delay circuit which can be implemented in standard CMOS memory process is proposed. The proposed negative-delay circuit which is a basic type of the analog SMD (synchronous mirror delay) measures the time difference between the input clock period and the target negative delay by utilizing analog behavior and repeats it in the next coming cycle. A new technology that compensates the auxiliary delay related with the output clock in the measure stage differentiates the Proposed method from the conventional method that compensates it in the delay-model stage which comes before the measure stage. A wider negative-delay range especially prominent in the high frequency performance than that in the conventional method can be realized through the proposed technology. In order to implement the wide locking range, a new frequency detector and the method for optimizing the bias condition of the analog circuit are suggested. An application example to the clocking circuits of a DDR SDRAM is simulated and demonstrated in a 0.6 ${\mu}{\textrm}{m}$ n-well double-poly double-metal CMOS technology.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.29 no.7
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• pp.566-569
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• 2018

A power line coupler that can apply high-frequency power to a railway overhead line structure was analyzed. It is difficult to supply auxiliary power to an overhead line in a high-voltage environment, and doing so requires a long-distance transfer. A method is proposed that utilizes the resonance on the Rogowski coil, which does not use a magnetic core. A simple overhead line structure was fabricated that consisted of a contact wire, messenger wire, and dropper. Couplers of various sizes were fabricated and deployed on the messenger wire, and the transfer characteristics of the two couplers were compared at a distance. As a result of applying the matching circuit to the coupler, the transmission efficiency was 53% at a distance of 2.5 m. The proposed method shows that it is possible to apply the auxiliary power by using the existing conductor in a special structure, such as the overhead line.