• Journal of IKEEE
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• v.15 no.2
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• pp.113-121
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• 2011

This paper presents the design of a fast auxiliary channel bus for DisplayPort 1.2 interface. The fast auxiliary channel supports Manchester transactions at 1Mbps and fast auxiliary transactions at 780Mbps. The Manchester transaction is used for managing the main link and auxiliary channel and the fast auxiliary transaction is for data transfer via the auxiliary channel. Simplified serial bus architecture is proposed to be implemented in fast auxiliary channel. The fast auxiliary channel transmitter and receiver are implemented with 7,648 LUTs and 6,020 slice register synthesized in Xilinx Vertex4 FPGA and can be operated at 72MHz to support 720Mbps.

• The Bulletin of The Korean Astronomical Society
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• v.46 no.2
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• pp.74.2-75
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• 2021

We demonstrate that a deep learning classifier that only uses to gravitational wave (GW) detectors auxiliary channel data can distinguish various types of non-Gaussian noise transients (glitches) with significant accuracy, i.e., ≳ 80%. The classifier is implemented using the multi-scale neural networks (MSNN) with PyTorch. The glitches appearing in the GW strain data have been one of the main obstacles that degrade the sensitivity of the gravitational detectors, consequently hindering the detection and parameterization of the GW signals. Numerous efforts have been devoted to tracking down their origins and to mitigating them. However, there remain many glitches of which origins are not unveiled. We apply the MSNN classifier to the auxiliary channel data corresponding to publicly available GravitySpy glitch samples of LIGO O1 run without using GW strain data. Investigation of the auxiliary channel data of the segments that coincide to the glitches in the GW strain channel is particularly useful for finding the noise sources, because they record physical and environmental conditions and the status of each part of the detector. By only using the auxiliary channel data, this classifier can provide us with the independent view on the data quality and potentially gives us hints to the origins of the glitches, when using the explainable AI technique such as Layer-wise Relevance Propagation or GradCAM.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.26 no.5
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• pp.514-520
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• 2015

Sidelobe canceller(SLC) requires main beam pattern(SUM beam) and auxiliary beam patterns for rejection of sidelobe noise jammer. For best performance of sidelobe noise jamming cancellation of adaptive SLC, gain dominant region of each auxiliary beam pattern shall not be overlapped one another in elevation/azimuth regions of sidelobe of main beam, and beam patterns of auxiliary channels should have low gains in regions of mainlobe of main beam. In the monopulse radar, the difference beam patterns for monopulse processing have these properties. This paper proposes the method using data from the difference channel for monopulse processing as data from auxiliary channel for sidelobe cancellation. For the proposed SLC, the results of simulation and performance analysis was presented. If the proposed method is used in the monopulse radar, SLC can be constructed by using basic SUM and difference channels without extra channel composition.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.13 no.7
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• pp.3433-3446
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• 2019

Aiming at the high complexity of traditional single-channel demodulation algorithm for PCMA signals, a new demodulation algorithm based on neural network is proposed to reduce the complexity of demodulation in the system of non-cooperative PCMA communication. The demodulation network is trained in this paper, which combines the preprocessing module and decision module. Firstly, the preprocessing module is used to estimate the initial parameters, and the auxiliary signals are obtained by using the information of frequency offset estimation. Then, the time-frequency characteristic data of auxiliary signals are obtained, which is taken as the input data of the neural network to be trained. Finally, the decision module is used to output the demodulated bit sequence. Compared with traditional single-channel demodulation algorithms, the proposed algorithm does not need to go through all the possible values of transmit symbol pairs, which greatly reduces the complexity of demodulation. The simulation results show that the trained neural network can greatly extract the time-frequency characteristics of PCMA signals. The performance of the proposed algorithm is similar to that of PSP algorithm, but the complexity of demodulation can be greatly reduced through the proposed algorithm.

• The Bulletin of The Korean Astronomical Society
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• v.36 no.2
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• pp.131.2-131.2
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• 2011

We present performance of artificial neural network multivariate classifier in identifying non-astrophysical origin noise transients from the gravitational wave channel of Laser Interferometer Gravitational-wave Observatory (LIGO). LIGO has successfully conducted six science runs, achieving the sensitivity as planned and producing many fruitful scientific results. It has been well observed that the detector noise is non-Gaussian and non-stationary, which results in large excess of noise transients called glitches arising from instrumental and environmental artifacts. Great efforts have been committed to reduce the glitches by tuning the detector instruments and by vetoing them but further improvement is still needed. To this end, there have been efforts to incorporate data from hundreds of auxiliary, physical and environmental channels into identifying the glitches in the gravitational wave channel. We introduce a multivariate classification method using Artificial Neural Networks (ANNs) that efficiently handles large number of variables. In this poster, we present preliminary results of the application of our ANN algorithm to data from LIGO's Science Run 4 and compare its performance with conventional vetoing method.

• Journal of IKEEE
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• v.14 no.1
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• pp.1-7
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• 2010

This paper presents an implementation of the DisplayPort AUX(Auxiliary) Channel. DisplayPort uses Main link, AUX Channel and Hot Plug Detect line to transfer the video & audio data. For isochronous transport service, source device converts to image and audio data which are to be transported through the Main Link and transports the restructured image and audio data to sink device. The AUX Channel provides link service and device service for discovering, initializing and maintaining the Main link. Hot Plug Detect line is used to confirm the connection between source device and sink device. The AUX Channel is implemented with 3315 LUTs(Look Up Table), 1466 Flip Flops and 168.782MHz max speed synthesized using Xilinx ISE 9.2i at SoC Master3.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.19 no.5
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• pp.805-814
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• 1994

In this paper, we introduce a new method which is available for analyzing the throughput of the packet radio network by using the auxiliary Markov transient matrix with a failure state and a success state. And we consider the effect of symbol error for the network state(X, R) consisted of the number of transmitting PRU X and receiving PRU R. We examine the packet radio network of a continuous time Markov chain model, and the direct sequence binary phase shift keying CDMA radio channel with hard decision Viterbi decoding and bit-by-bit changing spreading code. For the unslotted distributed multi-hop packet radio network, we assume that the packet error due to a symbol error of radio channel has Poisson process, and the time period of an error occurrence is exponentially distributed. Through the throughputs which are found as a function of radio channel parameters, such as the received signal to noise ratio and chips of spreading code per symbol, and of network parameters, such as the number of PRU and offered traffic rate, it is shown that this composite analysis enables us to combine the Markovian packet radio network model with a coded DS/BPSK CDMA radio channel.

• 한국신재생에너지학회:학술대회논문집
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• 2007.06a
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• pp.137-140
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• 2007

We consider the optimum air flow channel design for DMFC's in the present study. The effect of pressure drop across the inlet and outlet of a stack on the performance of a DMFC is the optimization of such geometric parameters is crucial to minimize the parasitic power usage by the auxiliary devices such as fuel pumps and blowers. In this paper, we present how the pressure drop control can optimize the driving point of a DMFC stack. Further, we show how the optimal fuel utilization ratio can be achieved, not degrading the performance of DMFC stacks. Overall, we discuss how the flow channel design affects the selection of balance of plant(BOP) components, the design of DMFC systems and the system efficiency.

• Proceedings of the IEEK Conference
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• 1998.10a
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• pp.1215-1218
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• 1998

본 논문은 Digital Audio Compression(AC-3) Standard 인 A-52를 기반으로 하였으며 Borland C++3.1 Compiler를 사용하여 AC-3 Decoding Algorithm 구현하였다. Input Stream은 DVD VOB File에서 AC-3 Stream만을 분리하여 사용하며 최종 출력은 16 Bit PCM File이다. AC-3의 Frame구조는 Synchronization Information, Bit Stream Information, Audio Block, Auxiliary Data, Error Check로 구성된다. Aduio Block 은 모두 6개의 Block으로 나뉘어져 있다. BSI와 Side Information을 참조하여 Exponent를 추출하여 Exponent Strategy에 따라 Exponent를 복원한다. 복원된 Exponent 정보를 이용하여 Bit Allocation을 수행하여 각각의 Mantissa에 할당된 Bit수를 계산하고 Stream으로부터 Mantissa를 추출한다. Coupling Parameter를 참조하ㅕ Coupling Channel을 Original Channel로 복원시킨다. Stereo Mode에 대해서는 Rematrixing을 수행한다. Dynamic Range는 Mantissa와 Exponent의 Magnitude를 바꾸는 것으로 선택적으로 사용할 수 있다. Mantissa와 Exponent를 결합하여 Floating Point coefficient로 만든 후 Inverse Transform을 수행하면 PCM Data를 얻을 수 있다. PC에서 듣기 위해서는 Multi Channel을 Stereo나 Mono로 Downmix를 수행한다. 이렇게 만들어진 PCM data는 PCM Data를 재생하는 프로그램으로 재생할 수 있다.

• Journal of IKEEE
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• v.14 no.4
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• pp.297-304
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• 2010

This paper presents a link layer design of DisplayPort interface with a state machine based on packet processing. The DisplayPort link layer provides isochronous video/audio transport service, link service, and device service. The merged video, audio main link, and AUX channel controller are implemented with 7,648 LUTs(Loop Up Tables), 6020 register, and 821,760 of block memory bits synthesized using a FPGA board and it operates at 203.32MHz.