• Korean Journal of Computational Design and Engineering
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• v.2 no.1
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• pp.1-10
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• 1997

Finding the optimum route of ship's pipes is complicated and time-consuming process. Experience of designers is the main tool in this process. To reduce design man-hours and human errors a design expert system shell and a geometric modeler is used to automate the design process. In this paper, a framework of the intelligent CAD system for pipe auto-routing is suggested, which consists of general-purpose expert system shell and a geometric modeler. The design expert system and the geometric modeling kernel have been integrated. The CADDS5 of Computervision is used as the overall CAD environment. The Nexpert Object of Neuron Data is used as the expert system shell. The CADDS5 ISSM is used as the interface that creates and modifies geometric models of pipes. Existing algorithms for the routing problem have been analyzed. Most of them are to solve the 2-D circuit routing problems. Ship piping system, specially within the engine room, is a complicated, large scale 3-D routing problem. Methods of expert system have been used to find the route of ship pipes on the main deck.

• Proceedings of the IEEK Conference
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• 2001.06b
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• pp.257-260
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• 2001

Routing region modeling methods for PCB auto-routing system in Shape based type(non-grid method) used region process type and the shape located in memory as a individual element, and this element consumed small memory due to unique data size. In this paper we design PCB(Printed Circuit Board) auto-routing system using the auction algorithm method that 1) Could be reached by solving the shortest path from single original point to various destination, and 2) Shaped based type without any memory dissipation with the best speed. Also, the auto-routing system developed by Visual C++ in Window environment, and can be used in IBM Pentium computer or in various individual PC system.

• Bulletin of the Society of Naval Architects of Korea
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• v.30 no.1
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• pp.19-27
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• 1993

현재 당사에서 개발한 ROUCAS SYSTEM은 조선 전장 설계 PACKAGE에 있어 혁신적인 SYSTEM으로 부상하고 있고, 앞으로 당사 전장 설계분야에서 많은 M/H감소를 기대하고 있다. ROUCAS SYSTEM은 6개의 MODULE로 구성되어 있고, CABLE AUTO-ROUTING 은 CABLE PLAN MODULE에 속해 있으며 ROUCAS SYSTEM의 핵심이라고 할 수가 있다.

• The KIPS Transactions:PartA
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• v.8A no.3
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• pp.269-278
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• 2001

Routing region modeling method of auto_routing systems are use the grid and the non-grid type. Though grid type has a few electrical and physical element on PCB, grid type has disadvantage which decrease the auto-routing speed dur to constraint with board and gird size. Thus it increase the memory capacity, Non-grid type(Shape baed type) use the region processing type, so it has 44.2% memory decrease effect than grid type in routing region. Thus, via number has 55% decrease effect, total routing time is increased 83.8% than conventional PCB system. In this paper we developed high speed PCB auto-routing system without memory waste by using shaped type applicant with auction algorithm which reaching the destination from one-point with best speed and solving the path problem. Also, this system developed by Visual C++ in IBM Pentium computer Window environment, and compatible with other PC.

• International Journal of Naval Architecture and Ocean Engineering
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• v.5 no.3
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• pp.468-477
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• 2013

An automatic pipe routing system is proposed and implemented. Generally, the pipe routing design as a part of the shipbuilding process requires a considerable number of man hours due to the complexity which comes from physical and operational constraints and the crucial influence on outfitting construction productivity. Therefore, the automation of pipe routing design operations and processes has always been one of the most important goals for improvements in shipbuilding design. The proposed system is applied to a pipe routing design in the engine room space of a commercial ship. The effectiveness of this system is verified as a reasonable form of support for pipe routing design jobs. The automatic routing result of this system can serve as a good basis model in the initial stages of pipe routing design, allowing the designer to reduce their design lead time significantly. As a result, the design productivity overall can be improved with this automatic pipe routing system.

• Journal of Auto-vehicle Safety Association
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• v.7 no.1
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• pp.13-19
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• 2015

Recently, Child safety has become one of the issue with Q10 dummy representing large child. The objective of this paper was to evaluate performance of three child restraints system (backless booster, high-back booster and without booster) by changing D-ring location in the rear seat. Sled tests were carried out with a Q 10 in 64km/h frontal impact. Before the dynamic sled tests, we assessed dummy positioning with difference in CRS types and height adjustment positions. Dynamic sled test results indicated that there is different performance of CRS types and belt routing. These test results will use as base line data for development CRS safety performance for Q 10.

• Proceedings of the KIEE Conference
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• 2005.10b
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• pp.469-471
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• 2005

Paper searches Neighbor Discovery Protocol's IPv6 address AutoConfiguration function that is IPv6's point technology. Also, I study plan to apply Router Advertisement function to Router. Router is formed whole system by Routing Process Card that do manager and Line Card that take charge of Packet Forwarding. Present plan that embody Router Advertisement function to Line Card.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.56 no.1
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• pp.28-36
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• 2007

Sensor networks are usually composed of tens or thousands of tiny devices with limited resources. Because of their limited resources, many researchers have studied on the energy management in the WSNs(Wireless Sensor Networks), especially taking into account communications efficiency. For effective data transmission and sensor fault detection in sensor network environment, a new remote monitoring system based on PCA(Principle Component Analysis) and AANN(Auto Associative Neural Network) is proposed. PCA and AANN have emerged as a useful tool for data compression and identification of abnormal data. Proposed system can be effectively applied to sensor network working in LEA2C(Low Energy Adaptive Connectionist Clustering) routing algorithms. To verify its applicability, some simulation studies on the data obtained from real WSNs are executed.

• Journal of KIISE:Computing Practices and Letters
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• v.13 no.3
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• pp.141-152
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• 2007

In this paper, we present a network-oriented lightweight real-time system, which is composed of an event-driven operating system called the Embedded Lightweight Operating System (ELOS) and a generic multi hop ad hoc routing protocol suite. In the ELOS, a conditional preemptive FCFS scheduling method with a guaranteed time slot is designed for efficient real-time processing. For more elaborate configurations, we reinforce fault tolerance by supplementing semi-auto configuration using wireless agent nodes. The developed hardware platform is also introduced, which is a scalable prototype constructed using off-the-shelf components. In addition, in order to evaluate the performance of the proposed system, we developed a ubiquitous network test-bed on which several experiments with respect to various environments are conducted. The results show that the ELOS is considerably favorable for tiny ubiquitous networked systems with real-time constraints.

• Journal of information and communication convergence engineering
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• v.8 no.6
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• pp.716-720
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• 2010

This paper proposes an effective fingerprint identification system with hardware block for thinning stage processing of a verification algorithm based on minutiae with 39% occupation of 32-bit RISC microprocessor cycle. Each step of a fingerprint algorithm is analyzed based on FPGA and ARMulator. This paper designs an effective hardware scheme for thinning stage processing using the Verilog-HDL in $160{\times}192$ pixel array. The ZS algorithm is applied for a thinning stage. The logic is also synthesized in $0.35{\mu}m$ 4-metal CMOS process. The layout is performed based on an auto placement-routing and post-simulation is performed in logic level. The result is compared with a conventional one.