• Korean Journal of Metals and Materials
• /
• v.49 no.4
• /
• pp.342-347
• /
• 2011

We fabricated the silicon nanodots using the low pressure chemical vapor deposition technique to investigate their electron field emission characteristics. Atomic force microscope measurements performed for the silicon nanodot samples having various process parameters, such as, deposition time and deposition pressure, revealed that the silicon nanodots with an average size of 20 nm, height of 5 nm, and density of $1.3\;{\times}\;10^{11}\;cm^{-2}$ were easily formed. Electron field emission measurements were performed with the silicon nanodot layer as the cathode electrode. The current-voltage curves revealed that the threshold electric field was as low as $8.3\;V/{\mu}m$ and the field enhancement factor reached as large as 698, which is compatible with the silicon cathode tips fabricated by other techniques. These electron field emission results point to the possibility of using a silicon-based light source for display devices.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.20 no.10
• /
• pp.864-868
• /
• 2007

Effect of high-temperature annealing on morphology of fully coherent self-assembled InAs quantum dots' grown on Si (100) substrates at $450^{\circ}C$ by atmospheric pressure metalorganic chemical vapor deposition(APMOCVD) was investigated by atomic force microscopy(AFM). When the dots were annealed at 500 - 600$^{\circ}C$ for 15 sec - 60 min, there was no appreciable change in the dot density but the heights of the dots increased along with the reduction in the diameters. In segregation from the InAs quantum dots and/or from the 2-dimensional InAs wetting layer which was not transformed into quantum dots looked responsible for this change in the dot size. However the change rates remained almost same regardless of annealing time and temperature, which may indicate that the morphological change due to thermal annealing is done instantly when the dots are exposed to high temperature annealing.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2014.02a
• /
• pp.356.1-356.1
• /
• 2014

The Isolation of few-layered transition metal dichalcogenides has mainly been performed by mechanical and chemical exfoliation with very low yields. in particular, the two-dimensional layer of molybdenum disulfide (MoS2) has recently attracted much interest due to its direct-gap property and potential application in optoelectronics and energy harvesting. However, the synthetic approach to obtain high-quality and large-area MoS2 atomic thin layers is still rare. In this account, a controlled thermal reduction-sulfurization method is used to synthesize large-MoOx thin films are first deposited on Si/SiO2 substrates, which are then sulfurized (under vacuum) at high temperatures. Samples with different thicknesses have been analyzed by Raman spectroscopy and TEM, and their photoluminescence properties have been evaluated. We demonstrated the presence of mono-, bi-, and few-layered MoS2 on as-grown samples. It is well known that the electronic structure of these materials is very sensitive to the number of layer, ranging from indirect band gap semiconductor in the bulk phase to direct band gap semiconductor in monolayers. This synthetic approach is simple, scalable, and applicable to other transition metal dichalcogenides. Meanwhile, the obtained MoS2 films are transferable to arbitrary substrates, providing great opportunities to make layered composites by stacking various atomically thin layers.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2013.08a
• /
• pp.287.1-287.1
• /
• 2013

The Isolation of few-layered transition metal dichalcogenides has mainly been performed by mechanical and chemical exfoliation with very low yields. in particular, the two-dimensional layer of molybdenum disulfide (MoS2) has recently attracted much interest due to its direct-gap property and potential application in optoelectronics and energy harvesting. However, the synthetic approach to obtain high-quality and large-area MoS2 atomic thin layers is still rare. In this account, a controlled thermal reductionsulfurization method is used to synthesize large-MoOx thin films are first deposited on Si/SiO2 substrates, which are then sulfurized (under vacuum) at high temperatures. Samples with different thicknesses have been analyzed by Raman spectroscopy and TEM, and their photoluminescence properties have been evaluated. We demonstrated the presence of single-, bi-, and few-layered MoS2 on as-grown samples. It is well known that the electronic structure of these materials is very sensitive to the number of layer, ranging from indirect band gap semiconductor in the bulk phase to direct band gap semiconductor in monolayers. This synthetic approach is simple, scalable, and applicable to other transition metal dichalcogenides. Meanwhile, the obtained MoS2 films are transferable to arbitrary substrates, providing great opportunities to make layered composites by stacking various atomically thin layers.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2007.11a
• /
• pp.39-39
• /
• 2007

원자층 증착(Atomic Layer Deposition: ALD) 방법은 반응물질들을 펄스형태로 챔버에 공급하여 기판표면에 반응물질의 표면 포화반응에 의한 화학적 흡착과 탈착을 이용한 박막증착기술이다. ALD법은 기존의 화학적 기상증착(Chemical Vapor Deposition: CVD)과 달리 자기 제한적 반응(self-limiting reaction) 에 의하여 반응가스가 기판 표면에서만 반응하고 가스와 가스 간에는 반응하지 않는다. 따라서 박막의 조성 정밀제어가 쉽고, 파티클 발생이 없으며, 대면적의 박막 증착시 균일성이 우수하고, 박막 두께의 정밀 조절이 용이한 장점이 있다. 이러한 ALD 방식으로 3차원의 반도체 장치 구조물에 산화막 등을 형성하는 공정에서 중요한 요소 중의 하나는 전구체의 충분한 공급이다. 따라서 증기압이 높은 전구체를 선호하는 경향이 있다. 그러나 증기압이 낮은 전구체를 사용할 경우, 공급량이 부족하여 단차 도포성(step coverage)이 떨어지는 문제가 있다. 원자층 증착 공정에서 전구체를 충분히 공급하기 위해전구체 온도를 증가시키거나 전구체의 공급시간을 늘리는 방법을 사용한다. 그러나 전구체 온도를 상승시키는 경우, 전구체의 변질이나 수명을 단축시키는 문제점을 발생시킬 수 있으며. 전구체를 충분히 공급하기 위하여 전구체의 공급시간을 늘이는 방법을 사용하면, 원하는 박막을 형성하기 위하여 소요되는 공정시간과 전구체 사용량이 증가된다. 본 논문에서는 이러한 문제점을 해결하기 위해 반응기 안에서 전구체 노출 시간을 조절하는 새로운 ALD 공정을 소개한다. 특히 이러한 기술을 적용하면 나노튜브를 성장시키는데 매우 유리하다. 본 연구에서 전구체 노출 시간을 조절하기 위하여 사용된 ALD 장비는 Lucida-D200-PL (NCD Technology사)이며 (TEMA)Zr와 H2O를 사용하여 ZrO2 나노튜브를 폴리카보네이트 위에 성장시켰다. 전구체의 노출 시간은 반응기의 Stop 밸브를 이용하여 조절하였으며, SEM, TEM 등을 이용하여 나노튜브의 균일성과 단차피복성 등의 특성을 관찰하였다. 그 결과 전구체 노출시간을 조절함으로써 높은 종횡비를 갖는 나노튜브를 성장 시킬 수 있음을 확인하였다. 또한 낮은 증기압을 가지는 전구체를 이용하여도 우수한 특성의 나노튜브를 균일하게 성장시킬 수 있었다.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2016.02a
• /
• pp.286-286
• /
• 2016

Hexagonal boron nitride (hBN) is a dielectric insulator with a two-dimensional (2D) layered structure. It is an appealing substrate dielectric for many applications due to its favorable properties, such as a wide band gap energy, chemical inertness and high thermal conductivity[1]. Furthermore, its remarkable mechanical strength renders few-layered hBN a flexible and transparent substrate, ideal for next-generation electronics and optoelectronics in applications. However, the difficulty of preparing high quality large-area hBN films has hindered their widespread use. Generally, large-area hBN layers prepared by chemical vapor deposition (CVD) usually exhibit polycrystalline structures with a typical average grain size of several microns. It has been reported that grain boundaries or dislocations in hBN can degrade its electronic or mechanical properties. Accordingly, large-area single crystalline hBN layers are desired to fully realize the potential advantages of hBN in device applications. In this presentation, we report the growth and transfer of centimeter-sized, nearly single crystal hexagonal boron nitride (hBN) few-layer films using Ni(111) single crystal substrates. The hBN films were grown on Ni(111) substrates using atmospheric pressure chemical vapor deposition (APCVD). The grown films were transferred to arbitrary substrates via an electrochemical delamination technique, and remaining Ni(111) substrates were repeatedly re-used. The crystallinity of the grown films from the atomic to centimeter scale was confirmed based on transmission electron microscopy (TEM) and reflection high energy electron diffraction (RHEED). Careful study of the growth parameters was also carried out. Moreover, various characterizations confirmed that the grown films exhibited typical characteristics of hexagonal boron nitride layers over the entire area. Our results suggest that hBN can be widely used in various applications where large-area, high quality, and single crystalline 2D insulating layers are required.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2015.08a
• /
• pp.100.2-100.2
• /
• 2015

반도체 산업이 성장하고 기술이 향상됨에 따라 소자의 소형화가 이루어지고 있다. 공정법으로는 atomic layer deposition (ALD), chemical vapor deposition (CVD) 등이 있다. 이러한 공정을 이용하여 수십 nm까지 미세화가 진행되고 있으며, 복잡한 구조의 박막을 실현하기 위해 전구체의 개발이 활발히 진행되고 있다. 전구체의 특성을 비실시간으로 분석하는 방법으로는 질량 분석법, 가스크로마토그래피, 적외선 분광법 등이 있다. 전구체의 특성을 실시간으로 분석하기 위해 Fourier transform infrared spectroscopy (FTIR)내에 attenuated total reflectance (ATR)를 거치시켰다. 본 연구는 구조를 개선한 ATR-FTIR을 이용하여 Tris-(dimethylamino) Zirconium (CpZr) 전구체의 흡착 거동을 분석하였다. ATR용 crystal은 Ge crystal을 사용했으며, 온도를 각각 30, 40, $50^{\circ}C$에서 CpZr 전구체의 흡착특성을 연구했다. 흡착성을 증가시키기 위해 Ge crystal 표면에 $ZrO_2$나노입자를 분포시켜 흡착특성을 비교 분석하였다. 또한 CpZr 전구체가 흡착된 Ge crystal 표면에 오존가스를 주입시킨 후 변화를 관찰하였다. Ge crystal표면에 나노입자를 분포시켜 CpZr 전구체를 흡착한 결과 나노입자를 분포시키지 않았을 때 보다 흡착강도가 높게 나타났다. 또한 CpZr 전구체가 흡착된 Ge crystal 표면에 오존가스를 주입한 결과 C-H 결합이 분해됨을 확인했다.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.26 no.3
• /
• pp.177-182
• /
• 2013

Transparent thin film transistors (TTFT) were fabricated on $N^+$ Si wafers. $SiO_2$, $Si_3N_4/SiO_2$ and $Al_2O_3/SiO_2$ grown on the wafers were used as gate insulators. The rf magnetron sputtered zinc tin oxide (ZTO) films were adopted as active layers. $N^+$ Si wafers were wet-oxidized to grow $SiO_2$. $Si_3N_4$ and $Al_2O_3$ films were deposited on the $SiO_2$ by plasma enhanced chemical vapor deposition (PECVD) and atomic layer deposition (ALD), respectively. The mobility, $I_{on}/I_{off}$ and subthreshold swing (SS) were obtained from the transfer characteristics of TTFTs. The properties of gate insulators were analyzed by comparing the characteristics of TTFTs. The property variation of the ZTO TTFTs with time were observed.

• Proceedings of the KIEE Conference
• /
• 2007.07a
• /
• pp.1339-1340
• /
• 2007

본 연구에서는 이종 차원 나노선과 나노입자의 결합에 따른 단일 나노선 소자의 전기적 특성 및 메모리 효과를 연구하였다. 열증착법으로 성장 된 p 형 Si 나노선에 Atomic Layer Deposition (ALD) 방법으로 10nm의 $Al_{2}O_{3}$를 증착한 후 Low Precensure - Chemical Vapor Deposition (LP-CVD)를 이용하여 Polycrystalline Sicon(Poly-Si)을 Si 나노선 위에 5nm 증착하고 습식 에칭법을 이용하여 poly Si 내의 $SiO_x$를 제거하여 Si 나노입자를 Si 나노선 위에 형성시켰다. 그 후 포토리소그래피 공정을 이용하여 Top gate 형태의 나노선-나노입자 이종결합 Field-Effect Transistor (FET) 소자를 제작하여 게이트 전압에 따른 드레인 전류-전압($I_{DS}-V_{DS}$)의 변화를 측정하여 나노선의 전기 소자로서의 특성을 확인하고, 게이트 전압을 양방향으로 swing 하면서 인가하여 $I_{DS}$ 전류 특성이 변화하는 것을 통해 메모리 효과를 조사하였다. 또한 나노입자의 결합이 게이트 전압의 인가 시간에 따라 드레인 전류에 영향을 미치는 것을 확인하여 메모리 소자로서의 가능성을 확인하였다.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2012.02a
• /
• pp.561-561
• /
• 2012

Graphene, two dimensional single layer of carbon atoms, has tremendous attention due to its superior property such as fast electron mobility, high thermal conductivity and optical transparency, and also found many applications such as field-effect transistors (FET), energy storage and conversion, optoelectronic device, electromechanical resonators and chemical sensors. Several techniques have been developed to form the graphene. Especially chemical vapor deposition (CVD) is a promising process for the large area graphene. For the electrically isolated devices, the graphene should be transfer to insulated substrate from Cu or Ni. However, transferred graphene has serious drawback due to remaining polymeric residue during transfer process which induces the poor device characteristics by impurity scattering and it interrupts the surface functionalization for the sensor application. In this study, we demonstrate the characteristics of solution-gated FET depending on the removal of polymeric residues. The solution-gated FET is operated by the modulation of the channel conductance by applying a gate potential from a reference electrode via the electrolyte, and it can be used as a chemical sensor. The removal process was achieved by several solvents during the transfer of CVD graphene from a copper foil to a substrate and additional annealing process with H2/Ar environments was carried out. We compare the properties of graphene by Raman spectroscopy, atomic force microscopy(AFM), and X-ray Photoelectron Spectroscopy (XPS) measurements. Effects of residual polymeric materials on the device performance of graphene FET will be discussed in detail.