• Journal of Power Electronics
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• 제18권2호
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• pp.418-431
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• 2018

This paper presents a new asymmetrical multilevel inverter with a reduced number of power electronic components. The proposed multilevel inverter is analyzed using two different configurations: i) First Configuration (with a switched diode) and ii) Second Configuration (without a switched diode). The presented topologies are compared with recent multilevel inverter topologies in terms of number of switches, gate driver circuits and blocking voltages. The proposed topologies can be cascaded to generate the maximum number of output voltage levels and they are suitable for high voltage applications. Various power quality issues are addressed for both of the configurations. The proposed 11-level inverter configuration is simulated using MATLAB and it is validated with a laboratory based experimental setup.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2006년도 전력전자학술대회 논문집
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• pp.251-253
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• 2006

This paper presents a start-up in-rush current reduction technique of asymmetry half-bridge DC/DC converter for PC power supply. The proposed converter is composed center-tapped half-bridge converter with blocking capacitor. The proposed converter can reduce the severe in-rush current when the proposed converter is power up. The validity of this study is confirmed from the experimental results.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2007년도 하계학술대회 논문집
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• pp.238-240
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• 2007

A new ZVZCS Single-Stage Power-Factor-Correction(PFC) AC/DC converter with boost PFC cell is integrated with voltage doubler rectified asymmetrical half-bridge(VDRAHB) is proposed in this paper. The proposed converter features good power factor correction, low current harmonic distortions, tight output regulations and low voltage of link capacitor. An 85W prototype was implemented to show that it meets the harmonic requirements and standards satisfactorily with nearly unity power factor and high efficiency over universal input.

• 한국방송∙미디어공학회:학술대회논문집
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• 한국방송공학회 1996년도 학술대회
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• pp.39-43
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• 1996

This paper presents the designing scheme of the duplexer for ground station using rectangular waveguide. The duplexer consists of 2-channel bandpass filters having asymmetrical inductive window and inductive post obstacles, coupled with H-plane Apertured-coupled junction, and operating in the frequency ranges of 14.5∼14.8GHz and 11.7∼12.0 GHz which are the DBS up/downlink for the domestic Ku-band ground station.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2000년도 전력전자학술대회 논문집
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• pp.725-728
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• 2000

This paper presents the switching angle and voltage for maximizing torque of 4-phase 6-poles SRM. The switching angle and voltages was determined through the approximated analysis and computer simulation by using SIMULINK according to the speed and torque required by load but we used new analytic equation from maximum torque characteristic And then one-chp micro-controller controls the switching angle and voltage of an asymmetrical inverter in the SRM driver. Also we expects that this method reduce micro-controller load and realize approximated real time control

• 전력전자학회논문지
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• 제6권4호
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• pp.341-347
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• 2001

전류 동기 검출법은 3상이 불평형된 전원 시스템 하에서도 전원전류를 평형된 정현파로 보상해 줄 뿐 만 아니라 순시전력이론에 비해서 단상에도 적용가능한 이론이다. 그러나 종전의 전류 동기 검출법은 능동전력필터가 고조파 성분과 기본파 무효성분을 독립 제어하는 하이브리드형 능동전력필터 시스템 등에는 적용하기 곤란하다. 따라서 본 연구에서는 불평형 전원 시스템 하에서도 비선형 부하전류를 유효성분, 기본파 무효성분 그리고 왜형성분으로 분해하여 독립제어 가능한 확장된 전류 동기 검출법을 제시하였다. 본 연구에서 제시한 방법의 타당성을 입증하기 위해, 불평형 교류 전원 하에서 평균전력이론, 동기 전류 검출법 그리고 제안된 방법을 실험에 의하여 비교검토하였다.

• 조명전기설비학회논문지
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• 제21권4호
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• pp.19-27
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• 2007

This paper presents a novel soft-switching PWM utility frequency AC to high frequency AC power conversion circuit incorporating boost H-bridge inverter topology, which is more suitable and acceptable for cost effective consumer induction heating applications. The operating principle and the operation modes are presented using the switch mode equivalent circuits and the operating voltage and current waveforms. The performances of this high-frequency inverter using the latest IGBTs are illustrated, which includes high frequency power regulation and actual efficiency characteristics based on zero voltage soft-switching(ZVS) operation ranges, and the power dissipation as compared with those of the conventional type high frequency inverter. In addition, a dual mode control scheme of this high frequency inverter based on asymmetrical pulse width modulation(PWM) and pulse density modulation(PDM) control scheme is discussed in this paper in order to extend the soft switching operation ranges and to improve the power conversion efficiency at the low power settings. The power converter practical effectiveness is substantially proved based on experimental results from practical design example.

• 항공우주시스템공학회지
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• 제8권2호
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• pp.7-13
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• 2014

In order to enable fail-safe operation the electro-hydrostatic actuators can be dualized. When a symmetrical actuator is combined in series with an asymmetrical actuator with single rod cylinder, the flow rates of their cylinders are unmatched. If their position controller has same configuration, one of their pumps can supply too much flow rate under particular load conditions, which should be bypassed into low pressure side e.g. by a relief valve. In this paper it is shown how the hydraulic circuit for the asymmetrically combined electro-hydrostatic actuator can be designed without sacrificing power consumption.

• Transactions on Electrical and Electronic Materials
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• 제16권6호
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• pp.293-302
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• 2015

Degraded data stability, weaker write ability, and increased leakage power consumption are the primary concerns in scaled static random-access memory (SRAM) circuits. Two new SRAM cells are proposed in this paper for achieving enhanced read data stability and lower leakage power consumption in memory circuits. The bitline access transistors are asymmetrically gate-underlapped in the proposed SRAM cells. The strengths of the asymmetric bitline access transistors are weakened during read operations and enhanced during write operations, as the direction of current flow is reversed. With the proposed hybrid asymmetric SRAM cells, the read data stability is enhanced by up to 71.6% and leakage power consumption is suppressed up to 15.5%, while displaying similar write voltage margin and maintaining identical silicon area as compared to the conventional memory cells in a 15 nm FinFET technology.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2001년도 추계학술대회 논문집
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• pp.119-123
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• 2001

In this paper, a DCM operated boost integrated single-stage forward-flyback converter is proposed. This proposed converter has high power factor, low harmonic distortion, and tight output regulation. To increase efficiency, zero voltage switching with asymmetrical control is used. This converter also give low voltage stress in switch and this results in low conduction loss with low turn-on resistance.