• 한국소음진동공학회:학술대회논문집
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• 한국소음진동공학회 2003년도 춘계학술대회논문집
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• pp.1020-1025
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• 2003

A successful design approach for noise barriers should be multidisciplinary because noise reduction goals influence both acoustical and non-acoustical considerations, such as maintenance, safety, physical construction, cost and visual impact These various barrier design options are closely related with barrier dimensions. In this study, we have proposed an optimal design method of noise barriers using simulated annealing algorithm, providing a barrier having the smallest dimension and achieving the specified noise reduction at a receiver region exposed to the industry and infrastructures, to help a successful barrier design.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2008년도 하계학술대회 논문집 Vol.9
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• pp.71-72
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• 2008

In this paper, the effect of thermal annealing on surface acoustic wave (SAW) properties of aluminum nitride (AlN) films were described. The films were fabricated on Si substrates by using Pulsed Reactive Magnetron Sputtering System. The SAW properties of $600^{\circ}C$-annealed AlN films were better than those of both $900^{\circ}C$-annealed AlN films and as-deposited ones. Their SAW velocities (Raleigh mode) and insertion losses were about 5212 m/s and 16.19 dB at $600^{\circ}C$ with the wavelength of $40{\mu}m$. The dependence of characteristics of AlN films on annealing conditions were also evaluated by using Fourier Transform-Infrared Spectroscopy (FT-IR) Spectrums and Atomic Force Microscopy (AFM).

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2008년도 하계학술대회 논문집 Vol.9
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• pp.129-130
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• 2008

Polycrystalline silicon (poly-Si) Schottky barrier thin film transistors (SB-TFT) are fabricated by erbium silicided source/drain for n-type SB-TFT. High quality poly-Si film were obtained by crystallizing the amorphous Si film with excimer laser annealing (ELA) or solid phase crystallization (SPC) method. The fabricated poly-Si SB-TFTs have a large on/off current ratio with a low leakage current. Moreover, the electrical characteristics of poly-Si SB TFTs are significantly improved by the additional forming gas annealing in 2 % $H_2/N_2$, because the interface trap states at the poly-Si grain boundaries and at the gate oxide/poly-Si channel decreased.

• 산업공학
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• 제12권1호
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• pp.94-101
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• 1999

The set covering(SC) problem is the problem of covering all the rows of an $m{\times}n$ matrix of ones and zeros by a subset of columns with a minimal cost. It has many practical applications of modeling of real world problems. The SC problem has been proven to be NP-complete and many algorithms have been presented to solve the SC problem. In this paper we present hybrid simulated annealing(HSA) algorithm based on the Simulated Annealing(SA) for the SC problem. The HSA is an algorithm which combines SA with a crossover operation in a genetic algorithm and a local search method. Our experimental results show that the HSA obtains better results than SA does.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2009년도 9th International Meeting on Information Display
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• pp.846-849
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• 2009

In this study, we manufactured polymer-LED using light emitting copolymer as the active layer. After cathode layer deposition, we did post-annealing at $150^{\circ}C$ during 10 min in $N_2$ glove box. Then, we confirmed that the efficiency of the device was significantly enhanced by post annealing process. Its value was increased from 0.18(cd/A) to 1.32(cd/A), approximately 7 times. This phenomenon is a result of improved stability between polymer and metal cathode for injection of electrons as the contact density increases.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2009년도 9th International Meeting on Information Display
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• pp.1430-1432
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• 2009

The effect of different annealing methods on the sheet resistance of indium tin oxide (ITO) on polyimide (PI) substrate has been investigated. As electro-annealing induced the predominant growth of crystallites of ITO thin films along (400) plane, the sheet resistance of ITO films that were electro-annealed for 2 mA at $180^{\circ}C$ considerably decreased from 50 to 28 ${\Omega}/cm^2$.

• 한국통신학회논문지
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• 제28권5C호
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• pp.468-475
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• 2003

본 논문에서는 패턴생성을 위한 최적의 이진 위상 컴퓨터형성 홀로그램을 설계하기 위해 합성된 SA알고리듬 및 유전 알고리듬을 이용하였다. 제안된 방법의 탐색과정에서 sGA를 사용하여 BPCGH를 생성하고. 결과 홀로그램 패턴을 SA 알고리듬의 초기 랜덤 투과함수로 이용하여 최적의 BPCGH를 설계하였다. 컴퓨터 시뮬레이션에서 독립적으로 사용된 SA 알고리듬과 유전 알고리듬을 비교한 결과 제안한 알고리듬이 회절 효율이 향상된 것을 확인할 수 있었다.

• 대한전기학회논문지
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• 제43권3호
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• pp.442-446
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• 1994

In this study, microwave dielectric properties of 0.182BaO-0.818TiOS12T ceramics were investigated with sintering temperature and annealing time, and the application for the microwave dielectric resonator was studied. In the specimen simtered at 1400[$^{\circ}C$], dielectric constant, unloaded Q and temperature coefficient of resonant frequency had good values of 35.36, 5692, -4.43[ppm/$^{\circ}C$], respectively. The specimen which temperature coefficient of resonant frequency($\tau$f) was vared positive to negative value was selected, thereafter microwave dielctric properties was investigated with annealing time(0~4[hr]) in the fixed annealing temperature of 1350[$^{\circ}C$]. Increasing the annealing time, dielectric constant and unloaded Q were increased and temperature coefficient of resonant frequency was decreased.

• 한국전기전자재료학회논문지
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• 제14권9호
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• pp.700-706
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• 2001

In this paper, I have fabricated and measured the gallium nitride(GaN) based Schottky diodes, and have carried out analyses of degradation of Schottky barrier characteristics. To improve of degraded Schottky barrier characteristics, I have carried out several experiments such as N$_2$ plasma exposure, annealing in N$_2$ ambient and annealing after N$_2$ plasma exposure. In the results of these experiments, I have achieved that only annealing in N$_2$ ambient is enough to improve the Schottky barrier characteristics, are temperature of 700$\^{C}$ and time of 90 sec in N$_2$ ambient furnace. for the analysis of these experiments, I have carried out the measurement of electric characteristics and quantitative analysis of etching damage using AES(Aguger Electron Spectroscopy).

• 한국전기전자재료학회논문지
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• 제11권9호
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• pp.705-710
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• 1998

Intrinsic gettering is usually to improve wafer quality, which is an important factor for reliable ULSI devices. In order to generate oxygen precipitation in lightly and heavily boron doped silicon wafers with or without high $^75 As^+$ ion implantation, the 2-step annealing method was adopted. After annealing, the were cleaved and etched with th Wright etchant. The morphology of cross section on samples was inspected by FESEM(field emission scanning electron microscopy). The morphology of unimplanted samples was rater rough than that of the implanted. Oxygen precipitation density observed by an optical microscope in lightly boron doped samples was about 3$\times10^6/cm^3$. However, in heavily boron doped samples, the density of oxygen precipitation was largest at $600^{\circ}C$ in 1st annealing, and decreased abruptly until $800^{\circ}C$, But it increased slightly at $1000^{\circ}C$ and was independent with the implantation.