• The Transactions of the Korean Institute of Electrical Engineers A
• /
• v.50 no.12
• /
• pp.556-560
• /
• 2001

To solve aeolian noise, we have tried several special conductor bundles equipped with spiral rod and one kind of low aeolian noise conductor with a special shape. Charge simulation method was applied to analyze electric field distributions of them in transmission line and corona cage for investigating the corona characteristics. This paper describes the electric field distributions and the performances of audible noise and radio interference from the special bundles in 765 kV transmission line by using corona characteristics obtained from corona cage simulation.

• 전자공학회논문지 IE
• /
• v.47 no.2
• /
• pp.1-7
• /
• 2010

This paper presents a low power digital PLL architecture and design for implementation of the PLL-based frequency synthesizers. In the proposed architecture, a wide band digital logic quadricorrelator is used for preliminary frequency detector and a narrow band digital logic quadricorrelator is used for final DCO control. Also, a circuit technique for reducing leakage current is adopted in order to minimize the standby mode power consumption of the deactivated block. The proposed digital PLL is designed and verified by MyCAD with MOSIS 1.8V $0.35{\mu}m$ CMOS technology, and the simulation results show that the power consumption can be lowered by more than 20%.

• 한국정보통신설비학회:학술대회논문집
• /
• 2006.08a
• /
• pp.215-218
• /
• 2006

In this paper, a small size, $7{\times}6mm^2$, Low Noise Amplifier(LNA) using LTCC process was fabricated with multi-layer structure for 2.4GHz wireless LAN. The measured results demonstrate that the bandwidth is 130 MHz, and the operating frequency is from 2.39GHz to 2.52GHz. The power gain is above 7.3 dB in the operating frequency range and the gain flatness is 0.5 dB. The maximum S11 is -4 dB and the maximum S22 is -7.5 dB. The noise figure is less than 1.83 dB. The measured power gain, S11 and S22 were had poorer performance than the simulation results. The reason for this discrepancy is that the input and output matching was not performed exactly. However, the noise figure of the LTCC low noise amplifier is better than simulation result. It is found that it is possible to fabricate a LTCC low noise amplifier in a small size.

• Proceedings of the IEEK Conference
• /
• 2000.06b
• /
• pp.141-144
• /
• 2000

In this paper, a new parallel array structure for the asynchronous array multiplier is introduced. This structure is designed for a data dependent asynchronous multiplier to reduces power which is wasted in conventional array structure. Simulation shows that this structure saves 30％ of power and 55％ of computation time comparing to conventional booth encoded array multiplier.

• Proceedings of the KIPE Conference
• /
• 2000.07a
• /
• pp.133-136
• /
• 2000

Current Source Inverter(CSI) operated in square wave mode is more efficient than the PWM CSI because of increased cost greater complexity of control algorithm, and substantial switching losses EMI. But the square wave output current of CSI rich in low order harmonics produce motor torque ripples. Therefore in this paper describes the active power filters for square wave current compensation of current source induction motor. Also extended current synchronous detection(ECSD) as compensation algorithm is proposed. To confirm the validity o proposed system some simulation results are presented and discussed.

• Proceedings of the IEEK Conference
• /
• 2007.07a
• /
• pp.467-468
• /
• 2007

This paper describes characteristics of converters of auxiliary power supply for electric railway vehicles. Auxiliary power supply is called Static Inverter(SIV) which supplied lamps, air conditioning and heat equipments, control systems, etc. Simulation results shows that line No.1 cheon contains low harmonics compared with those of KTX.

• Journal of Power Electronics
• /
• v.17 no.6
• /
• pp.1535-1544
• /
• 2017

Advances in FPGA technology have enabled fast real-time simulation of power converters, filters and loads. FPGA based HIL (Hardware-In-the-Loop) simulators have revolutionized control hardware and software development for power electronics. Common time step sizes in the order of 100ns are sufficient for simulating switching frequency current and voltage ripples. In order to keep the time step as small as possible, ideal switching function models are often used to simulate the phase legs. This often produces inferior results when simulating the discontinuous conduction mode (DCM) and disabled operational states. Therefore, the corresponding measurement and protection units cannot be tested properly. This paper describes a new solution for this problem utilizing a discrete-time PI controller. The PI controller simulates the proper DC and low frequency AC components of the phase leg voltage during disabled operation. It also retains the advantage of fast real-time execution of switch-based models when an accurate simulation of high frequency junction capacitor oscillations is not necessary.

• KSII Transactions on Internet and Information Systems (TIIS)
• /
• v.10 no.3
• /
• pp.1111-1130
• /
• 2016

Cooperative communications can significantly improve the wireless transmission performance with the help of relay nodes. In cooperative communication networks, relay selection and power allocation are two key issues. In this paper, we propose a relay selection and power allocation scheme RS-PA-PSACO (Relay Selection-Power Allocation-Particle Swarm Ant Colony Optimization) based on PSACO (Particle Swarm Ant Colony Optimization) algorithm. This scheme can effectively reduce the computational complexity and select the optimal relay nodes. As one of the swarm intelligence algorithms, PSACO which combined both PSO (Particle Swarm Optimization) and ACO (Ant Colony Optimization) algorithms is effective to solve non-linear optimization problems through a fast global search at a low cost. The proposed RS-PA-PSACO algorithm can simultaneously obtain the optimal solutions of relay selection and power allocation to minimize the SER (Symbol Error Rate) with a fixed total power constraint both in AF (Amplify and Forward) and DF (Decode and Forward) modes. Simulation results show that the proposed scheme improves the system performance significantly both in reliability and power efficiency at a low complexity.

• Journal of Power System Engineering
• /
• v.17 no.5
• /
• pp.86-93
• /
• 2013

This paper proposes the used of genetic algorithm for optimizing PI controller and describes the dynamic modeling simulation for the permanent magnet synchronous motor driven by simplified vector control with the aid of MATLAB-Simulink environment. Furthermore, three kinds of error criterion minimization, integral absolute error, integral square error, and integral time absolute error, are used as objective function in the genetic algorithm. The modeling procedures and simulation results are described and presented in this paper. Computer simulation results indicate that the genetic algorithm was able to optimize the PI controller and gives good control performance of the system. Moreover, simplified vector control on permanent magnet synchronous motor does not need to regulate the direct axis component current. This makes simplified vector control of the permanent magnet synchronous motor very useful for some special applications that need simple control structure and low cost performance.

• The Transactions of The Korean Institute of Electrical Engineers
• /
• v.63 no.9
• /
• pp.1212-1218
• /
• 2014

For OBC (On-Board Charger) and LDC (Low DC-DC Converter) used as essential power conversion systems of PHEV (Plug-in Hybrid Electric Vehicle), system performance is required as well as reliability, which is need to protect the vehicle and driver from various faults. While current development processor is sufficient for embodying functions and verifying performance in normal state during development of prototypes for OBC and LDC, there is no clear method of verification for various fault situations that occur in abnormal state and for securing stability of vehicle base, unless verification is performed by mounting on an actual vehicle. In this paper, a CCM (Charger Converter Module) was developed as an integrated structure of OBC and LDC. In addition, diverse fault situations that can occur in vehicles are simulated by a simulator to artificially inject into power conversion system and to test whether it operates properly. Also, HILS (Hardware-in-the-Loop Simulation) is carried out to verify whether LDC is operated properly under power environment of an actual vehicle.