• 대한전자공학회:학술대회논문집
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• 대한전자공학회 1999년도 하계종합학술대회 논문집
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• pp.357-360
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• 1999

A 20 MHz CMOS continuous low-pass filter using simulated floating inductor consisted of two fully-differential transconductors and a capacitor is presented. The theory of operation is described and simulation results show close agreement between predicted behaviour and experimential performance. Simulation results show that the filter has ripple bandwidth of 22 MHz, pass-band ripple of 0.36 ㏈. and cutoff frequency of 26 MHz at supplay voltage of $\pm$3 V. The power dissipation is 19.2 ㎽.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2007년도 심포지엄 논문집 정보 및 제어부문
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• pp.371-372
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• 2007

In this paper we present performance and implementation comparisons of high performance two dimensional forward and inverse Discrete Cosine Transform (2D-DCT/IDCT) algorithm and low power algorithm for $8{\times}8$ 20 DCT and quantization based on partial sum and its corresponding hardware architecture for FPGA in MPEG-4. The architecture used in both low power 20 DCT and 2D IDCT is based on the conventional row-column decomposition method. The use of Fast algorithm and distributed arithmetic(DA) technique to implement the DCT/IDCT reduces the hardware complexity. The design was made using Mentor Graphics Tools for design entry and implementation. Mentor Graphics ModelSim SE6.1f was used for Verilog HDL entry, behavioral Simulation and Synthesis. The 2D DCT/IDCT consumes only 50% of the Operating Power.

• Journal of Power Electronics
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• 제7권4호
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• pp.318-327
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• 2007

The design and performance analysis of a power factor corrected (PFC), single-phase, single switch flyback buck-boost ac-dc converter is carried out for low power battery charging applications. The proposed configuration of the flyback buck-boost ac-dc converter consists of only one switch and operates in discontinuous current mode (DCM), resulting in simplicity in design and manufacturing and reduction in input current total harmonic distortion (THD). The design procedure of the flyback buck-boost ac-dc converter is presented for the battery charging application. To verify and investigate the design and performance, a simulation study of the flyback buck-boost converter in DCM is performed using the PSIM6.0 platform. A laboratory prototype of the proposed single switch flyback buck-boost ac-dc converter is developed and test results are presented to validate the design and developed model of the system.

• 전기학회논문지
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• 제65권9호
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• pp.1626-1631
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• 2016

Generally, the low-voltage customer has been used with a linear load and nonlinear load in the 3-phase 4-wire distribution system. Linear load has usually configured the resistance and inductance, current phase is slower than the voltage phase, so power factor is low. It is required for the power factor correction device prior to the phase of the current than the voltage. The capacitor is connected in parallel to the load in order to ensure a low power factor. Power converter such as an inverter is a typical non-linear load. Non-linear load generates harmonic currents in the energy conversion process. Many electrical equipment may be adversely affected by the harmonic current. There, passive or active filter have been used to reduce these harmonics current. Passive filter consisting of inductor and capacitor generates a reactive power. According to the combination of filter inductor and capacitor, reactive power can be adjusted. In this paper, we analyzed how the combination of inductor and capacitor affects the overall power factor by simulation and measurement.

• 한국전기전자재료학회논문지
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• 제25권3호
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• pp.170-175
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• 2012

Power MOSFET is develop in power savings, high efficiency, small size, high reliability, fast switching, low noise. Power MOSFET can be used high-speed switching transistors devices. Recently attention to the motor and the application of various technologies. Power MOSFET is devices the voltage-driven approach switching devices are design to handle on large power, power supplies, converters, motor controllers. In this paper, design the 600 V Planar type, and design the trench type for realization of low on-resistance. For both structures, by comparing and analyzing the results of the simulation and characterization.

• Journal of electromagnetic engineering and science
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• 제7권3호
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• pp.103-108
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• 2007

In this paper, a low-power 2.4 GHz front-end for sensor network application (IEEE 802.15.4 LR-WPAN) is designed in a 0.18 um CMOS process. A power supply circuit with a novel temperature-compensation scheme is presented. The simulation and measurement results show that the front-end (LNA, Mixer) can achieve a voltage gain of 35.3 dB and a noise figure(NF) of 3.1 dB while consuming 5.04 mW (LNA: 2.16 mW, Mixer: 2.88 mW) of power at $27^{\circ}C$. The NF includes the loss of BALUN and BPF. The low-IF architecture is used. The voltage gain, noise figure and third-order intercept point (IIP3) variations over -45$^{\circ}C$ to 85$^{\circ}C$ are less than 0.2 dB, 0.25 dB and 1.5 dB, respectively.

• 전력전자학회논문지
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• 제18권4호
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• pp.387-396
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• 2013

This paper investigates the droop control of parallel inverters for an islanded mode of microgrid. Frequency and voltage droop control is one of power control and load demand sharing methods. However, although the active power is properly shared, the reactive power sharing is inaccurate with conventional method due to the unequal line impedances and the power coupling of active - reactive power. In order to solve this problem, an improved droop method with virtual inductor concept and a voltage and current controller properly designed have been considered and analyzed through the PSiM simulation. The performance of improved droop method is analyzed in not only low-voltage line but also medium voltage line.

• Journal of Power Electronics
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• 제13권5호
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• pp.909-918
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• 2013

This paper proposes a coordinated control of the reactive power between the STATCOMs (static synchronous compensators) and the grid-side converters (GSC) of wind farms equipped with PMSGs (permanent-magnet synchronous generators), by which the voltage fluctuations at the PCC (point of common coupling) are mitigated in the steady state. In addition, the level of voltage sags is reduced during grid faults. To do this, the GSC and the STATCOM supply reactive power to the grid coordinately, where the GSCs are fully utilized to provide the reactive power for the grid prior to the STATCOM operation. For this, the GSC capability of delivering active and reactive power under variable wind speed conditions is analyzed in detail. In addition, the PCC voltage regulation of the power systems integrated with large wind farms are analyzed for short-term and long-term operations. With this coordinated control scheme, the low power capacity of STATCOMs can be used to achieve the low-voltage ride-through (LVRT) capability of the wind farms during grid faults. The effectiveness of the proposed strategy has been verified by PSCAD/EMTDC simulation results.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2008년도 추계학술대회 논문집 전력기술부문
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• pp.503-505
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• 2008

Photovoltaic(PV) resource connected in the power system can be affect to the power quality. To analyze the power quality, this paper simulate the variation of power factor by PV resource connected to the low voltage system. The power factor calculator and full-bridge inverter of PV system are modeled by EMTP/MODELS. Simulation results according to the PV capacity and load are presented.

• 전기학회논문지P
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• 제60권1호
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• pp.19-26
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• 2011

In this paper, we designed Interpolation FIR(Finite Impulse Response) filter and 1-bit SDM(Sigma- Delta Modulator) for small digital audio speaker, which has low power consumption and high output characteristics. In order to achieve high linearity and low distortion performance of the systems, we adopt Type I Chevychev FIR filter which has equiripple characteristics in the pass band and proposed high efficient FIR filter structure. SDM is the most efficient modulation technique among the noise shaping techniques. In this paper, we implemented SDM using CIFB(Cascade of Intergrators, Feed-Back) which is generally used in DAC of small digital audio speakers. The proposed SDM structure can achieve high SNR, high-efficiency characteristics and low power consumption in mobile devices. Also considering manufacture of SoC(System on Chip), we performed simulation with Matlab and Verilog HDL to obtain optimal number of operational bits and verified a good experimental results.