• 전력전자학회:학술대회논문집
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• 전력전자학회 2018년도 추계학술대회
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• pp.62-64
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• 2018

In two-stage single-phase inverters, inherent double line frequency component is present at both input and output of the front-end converter. Generally large electrolytic capacitors are required to eliminate the ripple. It is well known that the low frequency ripple shortens the lifespan of the capacitor hence the system reliability. However, the ripple can hardly be eliminated without the hardware combined with an energy storage device or a certain control algorithm. In this paper, a novel power-decoupling control method is proposed to eliminate the double line frequency ripple at the front-end converter of the DC/AC power conversion system. The proposed control algorithm is composed of two loop, ripple rejection loop and average voltage control loop and no extra hardware is required. In addition, it does not require any information from the phase-locked-loop (PLL) of the inverter and hence it is independent of the inverter control. In order to prove the validity and feasibility of the proposed algorithm a 5kW Dual Active Bridge DC/DC converter and a single-phase inverter are implemented, and experimental results are presented.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2007년도 심포지엄 논문집 정보 및 제어부문
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• pp.140-142
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• 2007

This paper presents an effective method of precise velocity control at low speed with a low resolution encoder. Multirate observer to estimate the velocity at every DSP control period is used except a constant velocity mode. The observer corrects the estimation error when detects pulse signal. Unlike the conventional methods, the multirate estimator is stable at a low speed. However, the multirate estimator shows ripples at a constant velocity. Thus, in this paper we use a velocity prediction method which uses the present velocity from the previous average velocity to reject the ripple. In a summary, at a constant speed mode, the predicted velocity is used. Otherwise, the estimated velocity by the multirate obvserver is used. The effectiveness of the multirate observer and ripple rejection at low speed is verified through various simulations.

• 전기전자학회논문지
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• 제21권3호
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• pp.264-267
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• 2017

본 논문에서는 잡음 제거 회로를 이용하여 공급 전원 제거 비를 향상시킨 LDO(Low drop-out) 레귤레이터를 제안하였다. LDO 레귤레이터 내부의 오차증폭기와 패스 트랜지스터 사이에 잡음 제거 회로를 두어 전압 라인에서 들어오는 노이즈에 패스 트랜지스터가 받는 영향을 줄일 수 있게 설계하였으며, 기존의 LDO 레귤레이터와 동일한 레귤레이션 특성을 갖도록 했다. 제안한 회로는 0.18um 공정을 사용하였고 Cadence의 Virtuoso, Spectre 시뮬레이터를 사용하였다.

• 조명전기설비학회논문지
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• 제29권12호
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• pp.83-87
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• 2015

This paper presents a simple notch filter, which is so suitable for three-phase unbalanced and distorted power line. In the d-q synchronous transformation, three-phase unbalanced and distorted voltages generate lots of ripple voltages on d-q axes. The ripples make disturbances on controllers such as PLL of phase tracking. Unbalanced state makes ripple of double the frequency of power line. Odd harmonics 5th and 7th on the line make even 4th and 6th ripples on d-q axes due to the rotating reference frame, respectively. Cascaded two comb filters, delay lines 1/4T and 1/8T, are adopted for the ripple rejection. The filter rejects harmonics 2nd, 4th, 6th, 10th and so on. They are very effective to remove the ripples of both unbalance and distortion. The filter, implemented by two FIFOs on an experimental system, is adopted on a PLL controller of power line phase tracking. Through the simulation and experimental results, performance of the proposed comb filter has been validated.

• 전기전자학회논문지
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• 제20권3호
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• pp.318-321
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• 2016

IoT 산업이 빠르게 성장하면서 전원 관리 집적회로의 중요성이 부각되고 있다. 본 논문에서는 리플 Subtractor, 피드 포워드 커패시터, OTA를 이용한 LDO 구조를 제안한다. 이를 통해 10MHz가 넘는 고주파 영역에서도 -40dB 이상 높은 전원 전압 제거비(PSRR)를 얻었다. 설계된 Low-Dropout(LDO) 레귤레이터는 $0.18{\mu}m$ CMOS 공정에서 설계되었으며 시뮬레이션 결과 PSRR은 부하 전류 40mA, 500kHz에서 -73.4dB다. 최대 구동 가능 전류는 40mA이다.

• 한국음향학회지
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• 제18권4호
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• pp.23-30
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• 1999

본 연구에서는 통과대역폭, 리플, 저지대역 감쇠도의 필터특성을 고려하여 주어진 입력사양에 부합하는 withdrawal SAW 필터의 새로운 최적화 알고리즘을 개발하고자 하였다. 필터의 성능해석을 위해 델타함수 모델을 이용하였으며, 대표적인 필터구조로서 균일한 입력 IDT에 대해 출력단을 withdrawal weighting하는 경우를 선정, 해석하였다. 이를 위해 여덟개의 설계변수를 선정하였으며 각각의 변화가 성능변수에 미치는 영향을 고려하여 세 단계를 거쳐 최적화 알고리즘을 완성하였다. 첫 단계에서는 삽입손실을 고려하여 입출력 전극수와 형상의 규격을 결정하고 다음 단계에서는 위상반전 방법을 이용하여 대역폭을 조절하며, 마지막 단계에서는 전극을 추가, 제거하는 방법을 통해 저지대역의 특성규격을 만족시켰다. 본 연구를 통해 제시하는 새로운 withdrawal weighting 필터 설계방법은 기존의 설계 방법들과는 달리 통과대역폭, 리플. 저지대역 억압도, 삽입손실 등의 필터특성을 동시에 고려하며 주어진 입력사양에 부합하는 필터를 최적화할 수 있다.

• Journal of Power Electronics
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• 제19권4호
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• pp.881-893
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• 2019

This paper proposes a practical sliding-mode controller design for shaping the impedances of cascaded boost-converter power decoupling circuits for reducing the second order harmonic ripple in photovoltaic (PV) current. The cascaded double-boost converter, when used as power decoupling circuit, has some advantages in terms of a high step-up voltage-ratio, a small number of switches and a better efficiency when compared to conventional topologies. From these features, it can be seen that this topology is suitable for residential (PV) rooftop systems. However, a robust controller design capable of rejecting double frequency inverter ripple from passing to the (PV) source is a challenge. The design constraints are related to the principle of the impedance-shaping technique to maximize the output impedance of the input-side boost converter, to block the double frequency PV current ripple component, and to prevent it from passing to the source without degrading the system dynamic responses. The design has a small recovery time in the presence of transients with a low overshoot or undershoot. Moreover, the proposed controller ensures that the ripple component swings freely within a voltage-gap between the (PV) and the DC-link voltages by the small capacitance of the auxiliary DC-link for electrolytic-capacitor elimination. The second boost controls the main DC-link voltage tightly within a satisfactory ripple range. The inverter controller performs maximum power point tracking (MPPT) for the input voltage source using ripple correlation control (RCC). The robustness of the proposed control was verified by varying system parameters under different load conditions. Finally, the proposed controller was verified by simulation and experimental results.

• Journal of electromagnetic engineering and science
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• 제6권2호
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• pp.110-116
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• 2006

A reflective array type surface acoustic wave(SAW) dispersive delay line(DDL) with high time-bandwidth at the V/UHF-band is designed and fabricated for compressive receiver applications. This type of the SAW DDL has the properties of the relative bandwidth of 20 %, the time delay of 49.89 usec, the insertion loss of 38.5 dB and the side lobe rejection of 39 dB. In comparison with a commercial SAW DDL, the insertion loss, amplitude ripple and side lobe rejection are improved by $1.5dB{\pm}0.6dB$ and 4 dB respectively. Using the fabricated SAW DDL, the prototype of the compressive receiver is developed. It is composed of RF converter, fast tunable LO, chirp LO, A/D converter, signal processing unit and control unit. This prototype system shows a fine frequency resolution of below 30 kHz with high scan rate.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2019년도 전력전자학술대회
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• pp.207-209
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• 2019

This paper proposes a grid-tied photovoltaic (PV) system, consisting of Voltage-fed dual-active-bridge (DAB) dc-dc converter with single phase inverter. The proposed converter allows a small dc-link capacitor, so that system reliability can be improved by replacing electrolytic capacitors with film capacitors. The double line frequency free maximum power point tracking (MPPT) is also realized in the proposed converter by using Ripple Correlation method. First of all, to eliminate the double line frequency ripple which influence the reduction of DC source capacitance, control is developed. Then, a designing of Current control in DQ frame is analyzed and to fulfill the international harmonics standards such as IEEE 519 and P1547, $3^{rd}$ harmonic in the grid is directly compensated by the feedforward terms generated by the PR controller with the grid current in stationary frame to achieve desire Total Harmonic Distortion (THD). 5-kW PV converter and inverter module with a small dc-link film capacitor was built in the laboratory with the proposed control and MPPT algorithm. Experimental results are given to validate the converter performance.

• 한국산업정보학회논문지
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• 제24권6호
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• pp.35-42
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• 2019

본 논문에서는 TBM(Tunnel boring machine) 시스템의 기동 특성향상을 위해 기존에 제안되었던 회생기동방법에 대한 실제적으로 발생되는 문제점을 분석하고, 이에 대한 해결방법을 제안한다. 기존의 연구결과에서 나타나는 속도리플 문제를 해결하기 위하여, 우선 시스템 상에서의 발생하고 있는 문제점을 분석하고, 이를 보완할 수 있는 방법을 제시하였다. 개선된 방법을 실제 시스템에 적용하여 기존의 시스템 결과와 비교함으로써 제안된 방법이 효과적임을 검증하였다.