• Title/Summary/Keyword: and Parallel Processing

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Effect of starch nanoparticle on the quality characteristics of whipped cream (전분 나노입자 첨가가 휘핑크림 품질특성에 미치는 영향)

  • Shin, Hye-Young;Choi, Hee-Don;Hong, Jung Sun;Shin, Kyeong Won;Kim, Jong-Yea
    • Korean Journal of Food Science and Technology
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    • v.52 no.4
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    • pp.423-426
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    • 2020
  • This study was performed to investigate how the addition of starch nanoparticles prior to whipping could affect the quality characteristics and stability of full-fat dairy cream. Starch nanoparticles were prepared by dry heating under mildly acidic conditions and added to dairy cream as amount of 1, 3, and 5% (w/w). The whipped cream's storage stability, viscosity, overrun, and droplet size were investigated in combination with various starch nanoparticle contents. The storage stability and apparent viscosity increased in parallel with the increasing starch nanoparticle content compared to the control. The mean size and homogeneity of the droplets in the whipped cream increased with higher starch nanoparticle addition levels. Even though the whipped cream overrun was reduced by the addition of starch nanoparticles, the 1% addition level exhibited a similar overrun value as the control.

Novel IME Instructions and their Hardware Architecture for Fast Search Algorithm (고속 탐색 알고리즘에 적합한 움직임 추정 전용 명령어 및 구조 설계)

  • Bang, Ho-Il;SunWoo, Myung-Hoon
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.48 no.12
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    • pp.58-65
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    • 2011
  • This paper presents an ASIP (Application-specific Instruction Processor) for motion estimation that employs specific IME instructions and its programmable and reconfigurable hardware architecture for various video codecs, such as H.264/AVC, MPEG4, etc. With the proposed specific instructions and variable point 2D SAD hardware accelerator, it can handle the real-time processing requirement of High Definition (HD) video. With the SAD unit and its parallel operations using pattern information, the proposed IME instructions support not only full search algorithms but also other fast search algorithms. The hardware size is 25.5K gates for each Processing Element Group (PEG) which has 128 SAD Processor Elements (PEs). The proposed ASIP has been verified by the Synopsys Processor Designer and implemented by the Design Compiler using the IBM 90nm process technology. The hardware size is 453K gates for the IME unit and the operating frequency is 188MHz for 1080p@30 frame in real time. The proposed ASIP can reduce the hardware size about 26% and the number of operation cycles about 18%.

A Design and Implementation of OTU4 Framer for l00G Ethernet (100G 이더넷 수용을 위한 OTU4 프레이머 표준기술 설계 및 구현)

  • Youn, Ji-Wook;Kim, Jong-Ho;Shin, Jong-Yoon;Kim, Kwang-Joon
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.36 no.12B
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    • pp.1601-1610
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    • 2011
  • This paper discusses standardization activities, requirements and enabling technologies for 100G Ethernet and 100G OTN. The need of 100Gbps transport capacity has been gaining greater interest from service providers and carrier vendors. Moreover, optical transport networks based on OTN/DWDM are changing their properties to apply Ethernet traffic which is dramatically increasing. We realize and experimentally demonstrate OTU4 framer with commercial FPGA. The key features of the realized OTU4 framer are parallel signal processing function, multi-lane distribution function, GMP function and FEC function. The realized OTU4 framer has the large signal processing capacity of 120Gbps, which allows to transport about 120Gbps client signals such as $12{\times}10G$ Ethernet and $3{\times}40G$ Ethernet. The realized OTU4 framer has the advantages to quickly adjust to changing markets and new technologies by using commercial FPGA instead of ASIC.

The injection petrol control system about CMAC neural networks (CMAC 신경회로망을 이용한 가솔린 분사 제어 시스템에 관한 연구)

  • Han, Ya-Jun;Tack, Han-Ho
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.21 no.2
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    • pp.395-400
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    • 2017
  • The paper discussed the air-to-fuel ratio control of automotive fuel-injection systems using the cerebellar model articulation controller(CMAC) neural network. Because of the internal combustion engines and fuel-injection's dynamics is extremely nonlinear, it leads to the discontinuous of the fuel-injection and the traditional method of control based on table look up has the question of control accuracy low. The advantages about CMAC neural network are distributed storage information, parallel processing information, self-organizing and self-educated function. The unique structure of CMAC neural network and the processing method lets it have extensive application. In addition, by analyzing the output characteristics of oxygen sensor, calculating the rate of fuel-injection to maintain the air-to-fuel ratio. The CMAC may easily compensate for time delay. Experimental results proved that the way is more good than traditional for petrol control and the CMAC fuel-injection controller can keep ideal mixing ratio (A/F) for engine at any working conditions. The performance of power and economy is evidently improved.

Big Data-based Sensor Data Processing and Analysis for IoT Environment (IoT 환경을 위한 빅데이터 기반 센서 데이터 처리 및 분석)

  • Shin, Dong-Jin;Park, Ji-Hun;Kim, Ju-Ho;Kwak, Kwang-Jin;Park, Jeong-Min;Kim, Jeong-Joon
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.19 no.1
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    • pp.117-126
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    • 2019
  • The data generated in the IoT environment is very diverse. Especially, the development of the fourth industrial revolution has made it possible to increase the number of fixed and unstructured data generated in manufacturing facilities such as Smart Factory. With Big Data related solutions, it is possible to collect, store, process, analyze and visualize various large volumes of data quickly and accurately. Therefore, in this paper, we will directly generate data using Raspberry Pi used in IoT environment, and analyze using various Big Data solutions. Collected by using an Sqoop solution collected and stored in the database to the HDFS, and the process is to process the data by using the solutions available Hive parallel processing is associated with Hadoop. Finally, the analysis and visualization of the processed data via the R programming will be used universally to end verification.

An Offloading Scheduling Strategy with Minimized Power Overhead for Internet of Vehicles Based on Mobile Edge Computing

  • He, Bo;Li, Tianzhang
    • Journal of Information Processing Systems
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    • v.17 no.3
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    • pp.489-504
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    • 2021
  • By distributing computing tasks among devices at the edge of networks, edge computing uses virtualization, distributed computing and parallel computing technologies to enable users dynamically obtain computing power, storage space and other services as needed. Applying edge computing architectures to Internet of Vehicles can effectively alleviate the contradiction among the large amount of computing, low delayed vehicle applications, and the limited and uneven resource distribution of vehicles. In this paper, a predictive offloading strategy based on the MEC load state is proposed, which not only considers reducing the delay of calculation results by the RSU multi-hop backhaul, but also reduces the queuing time of tasks at MEC servers. Firstly, the delay factor and the energy consumption factor are introduced according to the characteristics of tasks, and the cost of local execution and offloading to MEC servers for execution are defined. Then, from the perspective of vehicles, the delay preference factor and the energy consumption preference factor are introduced to define the cost of executing a computing task for another computing task. Furthermore, a mathematical optimization model for minimizing the power overhead is constructed with the constraints of time delay and power consumption. Additionally, the simulated annealing algorithm is utilized to solve the optimization model. The simulation results show that this strategy can effectively reduce the system power consumption by shortening the task execution delay. Finally, we can choose whether to offload computing tasks to MEC server for execution according to the size of two costs. This strategy not only meets the requirements of time delay and energy consumption, but also ensures the lowest cost.

Efficient Workload Distribution of Photomosaic Using OpenCL into a Heterogeneous Computing Environment (이기종 컴퓨팅 환경에서 OpenCL을 사용한 포토모자이크 응용의 효율적인 작업부하 분배)

  • Kim, Heegon;Sa, Jaewon;Choi, Dongwhee;Kim, Haelyeon;Lee, Sungju;Chung, Yongwha;Park, Daihee
    • KIPS Transactions on Computer and Communication Systems
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    • v.4 no.8
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    • pp.245-252
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    • 2015
  • Recently, parallel processing methods with accelerator have been introduced into a high performance computing and a mobile computing. The photomosaic application can be parallelized by using inherent data parallelism and accelerator. In this paper, we propose a way to distribute the workload of the photomosaic application into a CPU and GPU heterogeneous computing environment. That is, the photomosaic application is parallelized using both CPU and GPU resource with the asynchronous mode of OpenCL, and then the optimal workload distribution rate is estimated by measuring the execution time with CPU-only and GPU-only distribution rates. The proposed approach is simple but very effective, and can be applied to parallelize other applications on a CPU and GPU heterogeneous computing environment. Based on the experimental results, we confirm that the performance is improved by 141% into a heterogeneous computing environment with the optimal workload distribution compared with using GPU-only method.

Motion Estimation Specific Instructions and Their Hardware Architecture for ASIP (ASIP을 위한 움직임 추정 전용 연산기 구조 및 명령어 설계)

  • Hwang, Sung-Jo;SunWoo, Myung-Hoon
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.48 no.3
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    • pp.106-111
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    • 2011
  • This paper presents an ASIP (Application-specific Instruction Processor) for motion estimation that employs specific IME instructions and its programmable and reconfigurable hardware architecture for various video codecs, such as H.264/AVC, MPEG4, etc. With the proposed specific instructions and hardware accelerator, it can handle the real-time processing requirement of High Definition (HD) video. With the parallel operations and SAD unit control using pattern information, the proposed IME instruction supports not only full search algorithm but also other fast search algorithms. The hardware size is 77K gates for each Processing Element Group (PEG) which has 256 SAD PEs. The proposed ASIP runs at 160MHz with sixteen PEGs and it can handle 1080p@30 frame in real time.

Ozone Generation Effects and Microbial Sterilization using Boron-doped Diamond (붕소가 도핑된 다이아몬드 전극을 이용한 오존발생 효과 및 미생물 살균)

  • In, Jin-Kyung;Yoo, Ji-Young;Einaga, Y.;Fujishima, A.;Park, Soo-Gil
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2003.07b
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    • pp.818-821
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    • 2003
  • Ozonic use of sterilization and heat treatment of raw material to extend the conservation period of food recently is increased by hard vegetable or microorganism sterilization purpose of fruit. If ozone can create as is easy comparatively because do air or oxygen by raw material and schedule period passes, there is advantage that do not leave the second contaminant because being gotten restored by oxygen. Also, because the effect is big to decolorization beside sterilization effect about microorganism, deodorization, disjointing of venomousness hazardous substance, food save, indoor air purge, good hand processing, hydrospace agricultural chemicals processing etc. the use extent is wide. This research ran parallel a sterilization experiment of E.coli colitis germs by ozone that manufacture ozonizer that use doped diamond maund electrode (BDD) by boron and searched special quality electrochemistry enemy of the ozonizer and is created. E.coli. After cultivate E.coli colitis germs during 37C 1 day is LB ship, after do ozonation, was sterilized more than 90% by ozone as result that examine sterilizing power by substance microscope and could confirm excellency of diamond electrode.

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Inference of Context-Free Grammars using Binary Third-order Recurrent Neural Networks with Genetic Algorithm (이진 삼차 재귀 신경망과 유전자 알고리즘을 이용한 문맥-자유 문법의 추론)

  • Jung, Soon-Ho
    • Journal of the Korea Society of Computer and Information
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    • v.17 no.3
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    • pp.11-25
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    • 2012
  • We present the method to infer Context-Free Grammars by applying genetic algorithm to the Binary Third-order Recurrent Neural Networks(BTRNN). BTRNN is a multiple-layered architecture of recurrent neural networks, each of which is corresponding to an input symbol, and is combined with external stack. All parameters of BTRNN are represented as binary numbers and each state transition is performed with any stack operation simultaneously. We apply Genetic Algorithm to BTRNN chromosomes and obtain the optimal BTRNN inferring context-free grammar of positive and negative input patterns. This proposed method infers BTRNN, which includes the number of its states equal to or less than those of existing methods of Discrete Recurrent Neural Networks, with less examples and less learning trials. Also BTRNN is superior to the recent method of chromosomes representing grammars at recognition time complexity because of performing deterministic state transitions and stack operations at parsing process. If the number of non-terminals is p, the number of terminals q, the length of an input string k, and the max number of BTRNN states m, the parallel processing time is O(k) and the sequential processing time is O(km).