• The Journal of the Acoustical Society of Korea
• /
• v.16 no.2
• /
• pp.80-88
• /
• 1997

In this paper, the implementation of audio/data processor using ETRI DSP to support analog mode in digital/analog dual mode mobile phone is presented. Audio/data processor performs the wideband data processing, audio signal processing, demodulation function, and data rate conversion when it is operated in analog mode. These functions are programmed in assembly language, and then loaded to ETRI DSP together with vocoder program for the digital mode operation. This is a very efficient implementation of the dual mode cellular phone ASIC since the vocoder for the digital mode and audio/data processor for the analog mode are programmed together in the same hardware.

• Journal of the Semiconductor & Display Technology
• /
• v.20 no.2
• /
• pp.77-81
• /
• 2021

In this paper, a low-csst ECG system using a digital filter was implemented. After amplifying the analog ECG signal, it is converted into a digital signal and filtered. The developed ECG module is miniaturized by removing the analog filter element that occupies the existing volume and replacing it with a digital filter using a 3-stage Butterworth filter which is one of IIR filters. It uses a serial monitoring program with C# to check and save the ECG waveform measured on a computer screen. The ECG system using a developed digital filter in this paper uses a low-cost processor instead of an expensive, high-end processor, and its size and price are reduced by converting the analog filter to a digital filter. In addition, since the waveform of the developed ECG system is similar to the actual ECG waveform of MIT-BIU, it is considered that the existing analog filter can be replaced with the developed digital filter.

• Journal of the Korea Society of Computer and Information
• /
• v.7 no.4
• /
• pp.115-120
• /
• 2002

This paper presents the implementation of IS-95 CDMA signal processor, baseband and Intermediate Frequency(IF) digital converter using Field Programmable Gate Array(FPGA) and ADC/DAC and frequency up/down converter IS-95 CDMA channel processor is generated the pilot channel signal with short PN code and Walsh-code generator. The digital If is composed of FPGA. digital transmit/receive signal processor and high speed analog-to-digital converter(ADC) and digital-to-analog converter(DAC). The frequency up/down converter consisted of filter, mixer, digital attenuator and PLL is analog conversion between intermediate frequency(IF) and baseband. This implemented system can be deployed in the IS-95 CDMA base station device etc.

• Journal of the Korea Academia-Industrial cooperation Society
• /
• v.4 no.2
• /
• pp.63-70
• /
• 2003

In this paper, an MFC (Mass Flow Controller) which is widely used in many semiconductor manufacturing processes for controlling the mass flow rate of a gas is designed and implemented using the PIC 16F876 of Microchip, Inc. The MFC implemented in this thesis has the form of hybrid-type, i.e., the mixed-type of the analog-type MFC, which has many problems such as low accurary, and digital-type MFC, which use an expensive DSP (Digital Signal Processor) and an ADC (Analog to Digital Convertor) with high precision. The MFC is consists of the sensor unit, the control unit and the actuator unit, and it has used the automatic calibration algorithm and the reference table method for the improvement of the performance.

• Journal of the Korean Society for Precision Engineering
• /
• v.16 no.1 s.94
• /
• pp.61-67
• /
• 1999

A laser Doppler vibrometer based on the laser heterodyne interferometry is employed to measure the vibration velocity of vibrating objects. In this paper, we propose a real time analog signal processor of a laser Doppler vibrometer to reduce the degradation of Doppler signals mainly caused by environmental noises. In the proposed real time signal processor of an laser Doppler vibrometer, a pre-processor and a logical motion direction detector are designed to reduce the detection errors of the object motion direction. Also, a noise detection and rejection circuit is designed to reject the unfiltered noises.

• The Journal of Korea Robotics Society
• /
• v.2 no.3
• /
• pp.205-211
• /
• 2007

In this paper, the prototype of surface EMG (ElectroMyoGram) sensor is developed for the robotic rehabilitation applications, and the developed sensor is composed of the electrodes, analog signal amplifiers, analog filters, ADC (analog to digital converter), and DSP (digital signal processor) for coding the application example. Since the raw EMG signal is very low voltage, it is amplified by about one thousand times. The artifacts of amplified EMG signal are removed by using the band-pass filter. Also, the processed analog EMG signal is converted into the digital form by using ADC embedded in DSP. The developed sensor shows approximately the linear characteristics between the amplitude values of the sensor signals measured from the biceps brachii of human upper arm and the joint angles of human elbow. Finally, to show the performance of the developed EMG sensor, we suggest the application example about the real-time human elbow motion acquisition by using the developed sensor.

• Journal of the Korean Institute of Telematics and Electronics B
• /
• v.31B no.1
• /
• pp.49-56
• /
• 1994

This paper describes the design principles and methods of electronic processor for thermal imager with the SPRITE detector, operating in the 8-12 micron band. The thermal imager consists of a optical scanner containing the detector and an electrical signal processor. The optical scanner utilizing rotating polygon and oscillating mirror, is 2-dimensional serial/parallel scan type using 5 elements of the detector. And the electronic processor has pre-processing of 5 chnanel's thermal signal from the detector, and performs digital scan conversion to reform the parallel data stream into serial analog data compatible with conventional RS-170 video. Through the designed electronic processor, we have acquired a satisfactory thermal image. And the MRTD (Minimum Resolvable Temperature Difference) is 0.5$^{\circ}$K at 7.5 cycles/mm.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.17 no.3
• /
• pp.297-306
• /
• 1992

Algorithms for implementing one chip binary image processor has been studied. In this paper, image quality improvement algorithms, for the data pre-processed with shading and gamma correction after digitizing the analog signal from CCD or CIS, such as : Improved high quality binarization algorithm is suggested. Error diffusion algorithms for high quality half-tone images is analyzed, Fuzzy Theory based mixed mode algorithm is suggested.

• Proceedings of the Korean Society of Marine Engineers Conference
• /
• 2005.06a
• /
• pp.757-763
• /
• 2005

A multi-channel seismic system has been developed and applied for bedrock mapping in near shore environment. The system is composed of an analog signal processor and an A/D converter installed on the computer, and a streamer with the group interval of 5 meters. The system is accomplished with a data acquisition program which controls the system and a data processing software. With the PC-based shallow marine seismic survey system high-resolution 2-D marine seismic profiles which have high S/N ratios can be obtained after appropriate data processing.

• The Journal of the Korea institute of electronic communication sciences
• /
• v.15 no.3
• /
• pp.479-486
• /
• 2020

In this paper, we present a design method for improving the linearity and dynamic range of the analog current mode multiplier circuit, which is one of the key devices in an analog current mode AI processor. The proposed circuit consists of 4 quadrant translinear loops made up of NMOS transistors only, which minimizes physical mismatches of the transistors. The proposed circuit can be implemented at 117㎛ × 109㎛ in 0.35㎛ CMOS process and has a total harmonic distortion of 0.3%. The proposed analog current mode multiplier is expected to be useful as the core circuit of a current mode AI processor.