• The Transactions of The Korean Institute of Electrical Engineers
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• v.56 no.1
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• pp.112-116
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• 2007

We have investigated the hysteresis phenomenon of a hydrogenated amorphous silicon thin film transistor (a-Si:H TFT) and analyzed the effect of hysteresis phenomenon when a-Si:H TFT is a pixel element of active matrix organic light emitting diode (AMOLED). When a-Si:H TFT is addressed to different starting gate voltages, such as 10V and 5V, the measured transfer characteristics with 1uA at $V_{DS}$ = 10V shows that the gate voltage shift of 0.15V is occurred due to the different quantities of trapped charge. When the step gate-voltage in the transfer curve is decreased from 0.5V to 0.05V, the gate-voltage shift is decreased from 0.78V to 0.39V due to the change of charge do-trapping rate. The measured OLED current in the widely used 2-TFT pixel show that a gate-voltage of TFT in the previous frame can influence OLED current in the present frame by 35% due to the change of interface trap density induced by different starting gate voltages.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.32 no.4
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• pp.272-275
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• 2019

We investigated the electrical characteristics of amorphous silicon-zinc-tin-oxide (a-SZTO) thin films deposited by RF-magnetron sputtering at room temperature depending on the deposition time. We fabricated a thin film transistor (TFT) with a bottom gate structure and various channel thicknesses. With increasing channel thickness, the threshold voltage shifted negatively from -0.44 V to -2.18 V, the on current ($I_{on}$) and field effect mobility (${\mu}_{FE}$) increased because of increasing carrier concentration. The a-SZTO film was fabricated and analyzed in terms of the contact resistance and channel resistance. In this study, the transmission line method (TLM) was adopted and investigated. With increasing channel thickness, the contact resistance and sheet resistance both decreased.

• 한국정보디스플레이학회:학술대회논문집
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• 2002.08a
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• pp.263-267
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• 2002

We are standing at the beginning of the industrialization of flexible thin-film transistor backplanes. An important group of candidates is based on silicon thin films made on metal or plastic foils. The main features of amorphous, nanocrystalline and microcrystalline silicon films for TFTs are summarized, and their compatibility with foil substrate materials is discussed.

• 한국정보디스플레이학회:학술대회논문집
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• 2006.08a
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• pp.413-418
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• 2006

Highly stable thin-film transistor (TFT) pixel employing both low temperature polycrystalline silicon (LTPS) and amorphous silicon (a-Si) for active matrix organic light emitting diode (AMOLED) is discussed. ELA (excimer laser annealing) LTPS-TFT pixel should compensate $I_{OLED}$ variation caused by the non-uniformity of LTPS-TFT due to the fluctuation of excimer laser energy and amorphous silicon TFT pixel is desired to suppress the decrease of $I_{OLED}$ induced by the degradation of a-Si TFT. We discuss various compensation schemes of both LTPS and a-Si TFT employing the voltage and the current programming.

• Proceedings of the KIEE Conference
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• 1990.11a
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• pp.93-96
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• 1990

The characteristics of an inverted staggered-type hydrogenated amorphous silicon thin film transistor has been analyzed by employing numerical simulation. The field effect mobility and threshold voltage are characterized as a function of density of deep and tail states and lattice temperature. It has been found that the density of deep states plays an important role of determining the threshold voltage, while the field effect mobility are very sensitive to the slope of band tail states. Also, the numerically temperature dependence of field effect mobility and threshold voltage has been in good agreements with the experimental results.

• Electrical & Electronic Materials
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• v.9 no.10
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• pp.1008-1012
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• 1996

I-V, C-V characteristics of inverted staggered type hydrogenerated amorphous silicon thin film transistor(a-Si:H TFT) was studied and experimentally verified. The results show that the log-log plot of drain current increased by voltage increase. The saturated drain current of DC output characteristics increased at a fixed gate voltage. According to the increase of gate voltage, activation energy of electron and the increasing width of Id at high voltage were decreased. Id saturation current saturated at high Vd over 4.5V, Vg-ld hysteresis characteristic curves occurred between -15V and 15V of Vg. Hysteresis current decreased at low voltage of -15V and increased at high voltage of 15V.

• Proceedings of the IEEK Conference
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• 2000.06b
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• pp.44-47
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• 2000

본 연구는 α-Si:H TFT(Amorphous Silicon Thin Film Transistor)를 대체 할 펜타센을 활성층으로 사용하는 박막 트랜지스터를 제작에 관한 것이다. 유기 박막 트랜지스터는 유기발광소자와 함께 유연한 디스플레이에 응용된다. 펜타센 박막 트랜지스터의 제작은 채널 길이 25㎛, 70㎛, 소스, 드레인, 게이트 전극으로 Au을 lift off 공정으로 제작하였으며, 펜타센은 OMBD(Organic Molecular Beam Deposition)로 기판온도를 80℃로 유지하여 증착하였다. 제작된 소자로부터 트랜지스터 전류-전압 특성곡선을 측정하였고, 게이트에 의한 채널의 전도도가 조절됨을 확인하였다. 그리고, 전달특성곡선으로부터 문턱전압과 전계효과 이동도를 추출하였다.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.08a
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• pp.343-343
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• 2011

저온에서의 Thin Film Transistor (TFT) 혹은 Nonvolatile memory (NVM) 등의 MOS 구조 소자들의 높은 전기적 특성에 관한 연구들이 진행 되면서 mobility와 stability 그리고 구조화의 용이성에 대한 연구가 진행됨에 따라 amorphous silicon의 결정화를 통해 전기적 특성을 향상 시킨 Nanocrystalline silicon (nc-Si)/Microcrystalline silicon (${\mu}c$-Si)에 대한 연구가 관심을 받고 있다. 본 논문에서는 ${\leq}300^{\circ}C$에서 Inductively coupled plasma chemical vapor deposition를 이용한 TFT을 제작하였다. 가스비, 온도, 두께에 따른 결정화 정도를 Raman spectra를 통해 확인한 후 Bottom gate와 Top gate 구조의 TFT를 제작 하고 결정화에 따른 전기적 특성 향상과 그의 덧붙여 플라즈마 처리를 통한 특성 향상을 확인 하였다.

• Proceedings of the KSME Conference
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• 2007.05b
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• pp.2453-2458
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• 2007

The performance of polysilicon thin film transistor (p-Si TFT) has an important role in the operation of active matrix liquid crystal displays. To fabricate the p-Si TFTs that have uniform characteristics, understanding of the recrystallization mechanism of silicon is crucial. Especially, the analysis of the transient temperature variation and the liquid-solid interface motion is required to find the mechanism. The thermal conductivity is one of the most important parameters to understand the mechanism. In this work, a KrF eximer laser beam was irradiated to amorphous silicon thin films. We measured the transient reflectivity at the wavelength of 633 nm. We carried out the numerical simulation of one dimension conduction equation so that we determined the most well-fitted thermal conductivity by comparing the numerically obtained transient reflectivity with the experimentally measured one. The experimentally determined thermal conductivity of amorphous silicon thin films is 1.5 W/mK.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.36D no.1
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• pp.57-62
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• 1999

Polycrystaline thin film transistors are fabricated on the transparent glass substrate by a lamp-scan annealing. The line-shaped lamp scanning method, which is profitable for large area process, effectively radiated silicon film on glass substrate. Amorphous silion film absorbs the light which is emitted from halogen-lamp and it transformed into crystalline silicon by metal-induced lateral crystallization. In order to enhance the annealing effect, capping layer was deposited on the whole substrate. When the scan speed was 1-2mm/sec, lateral crystallization of amorphous silicon under capping layer was 18~27${\mu}m/scan$. The thin film transistor fabricated by this method shows high electron mobility over 130$cm^2/V{\cdot}sec$