• Journal of the Korean Institute of Telematics and Electronics D
• /
• v.34D no.4
• /
• pp.33-39
• /
• 1997

The crystallization temperature of an amorphous silicon (a-Si) can be lowered down to 400.deg. C by a new method : Double-metal induced lateral crystallization (DMILC). The a-Si film was laterally crystallized from Ni and Pd deposited area, and its lateral crystallization rate reaches up to 0.2.mu.m/hour at that temperature and depends on the overlap length of Ni and Pd films; the shorter the overlap length, the faster the rate. Poly-Silicon thin film transistors (poly-Si TFT's) fabricated by DMILC at 400.deg. C show a field effect mobility of 38.5cm$^{3}$/Vs, a minimum leakage current of 1pA/.mu.m, and a slope of 1.4V/dec. The overlap length does not affect the characteristics of the poly-Si TFT's, but determines the lateral crystallization rate.

• 한국정보디스플레이학회:학술대회논문집
• /
• 2005.07a
• /
• pp.297-300
• /
• 2005

The characteristics of polycrystalline silicon thin-film transistors (poly-Si TFTs) fabricated using sputter deposited amorphous silicon (a-Si) precursor films are investigated. The a-Si films were deposited on flexible polymer substrates using argon-helium mixture gases to minimize the argon incorporation into the film. The precursor films were then laser annealed by using a XeCl excimer laser and a four-mask-processed poly-Si TFT was fabricated with fully self-aligned top gate structure. The fabricated pMOS TFT showed field-effect mobility of $32.4cm^2/V{\cdot}s$ and on/off ratio of $10^6$.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2006.06a
• /
• pp.430-431
• /
• 2006

This letter reports the fabrication of polycrystalline silicon thin-film transistors (poly-Si TFT) on flexible plastic substrates using amorphous silicon (a-Si) precursor films by sputter deposition. The a-Si films were deposited with mixture gas of argon and helium to minimize the argon incorporation into the film. The precursor films were then laser crystallized using XeCl excimer laser irradiation and a four-mask-processed poly-Si TFTs were fabricated with fully self-aligned top gate structure.

• Proceedings of the KIEE Conference
• /
• 2005.07c
• /
• pp.2052-2054
• /
• 2005

TFT-LCD requires to use poly silicon for High resolution and High integration. Thin film make of Poly silicon on the excimer laser-induced crystallization of PECVD(plasma-enhanced chemical vapor deposition)-grown amorphous silicon. In the thin film hydrogen affects to a device performance from bad elements like eruption, void and etc. So dehydrogenation prior to laser exposure was necessary. In this study, use RTP(Rapid Thermal Process) at various temperature from $670^{\circ}C$ to $750^{\circ}C$ and fabricate poly-silicon. it propose optimized RTP window to compare grain size to use poly silicon's SEM pictures and crystallization to analyze Raman curved lines.

• 한국정보디스플레이학회:학술대회논문집
• /
• 2004.08a
• /
• pp.305-308
• /
• 2004

We present a novel process for the ultra low temperature (<150$^{\circ}C$) polycrystalline silicon (ULTPS) TFT for the flexible display applications on the plastic substrate. The sequential lateral solidification (SLS) was used for the crystallization of the amorphous silicon film deposited by rf magnetron sputtering, resulting in high mobility polycrystalline silicon (poly-Si) film. The gate dielectric was composed of thin $SiO_2$ formed by plasma oxidation and $Al_2O_3$ deposited by plasma enhanced atomic layer deposition. The breakdown field of gate dielectric on poly-Si film showed above 6.3 MV/cm. Laser activation reduced the source/drain resistance below 200 ${\Omega}$/ㅁ for n layer and 400 ${\Omega}$/ㅁ for p layer. The fabricated ULTPS TFT shows excellent performance with mobilities of 114 $cm^2$/Vs (nMOS) and 42 $cm^2$/Vs (pMOS), on/off current ratios of 4.20${\times}10^6$ (nMOS) and 5.7${\times}10^5$ (PMOS).

• 한국정보디스플레이학회:학술대회논문집
• /
• 2008.10a
• /
• pp.218-221
• /
• 2008

Bottom-gate microcrystalline silicon thin film transistors (${\mu}c$-Si:H TFTs) were fabricated on glass and transparent polyimide substrates by conventional 13.56 MHz RF plasma enhanced chemical vapor deposition at $200^{\circ}C$. The deposition rate of the ${\mu}c$-Si:H film is 24 nm/min and the amorphous incubation layer near the ${\mu}c$-Si:H/silicon nitride interface is unobvious. The threshold voltage of ${\mu}c$-Si:H TFTs can be improved by $H_2$ or $NH_3$ plasma pretreatment silicon nitride film.

• Journal of the Korea Academia-Industrial cooperation Society
• /
• v.8 no.4
• /
• pp.738-742
• /
• 2007

The variations in the device characteristics of hydrogenated amorphous thin-film transistors (a-Si:H TFTs) were studied according to the processes of pixel electrode fabrication to make active-matrix flat-panel displays. The off-state current was about 1 pA and the switching ratio was over $10^6$ before fabrication of pixel electrodes; however, the off-state current increased over 10 pA after fabrication of pixel electrodes. Surface treatment on SiNx passivation layers using plasma could improve the off-state characteristics after pixel electrode process. $N_2$ plasma treatment gave the best result. Charge accumulation on the SiNx passivation layer during the deposition of transparent conducting layer might cause the increase of off-state current after the fabrication of pixel electrodes.

• The Transactions of the Korean Institute of Electrical Engineers C
• /
• v.49 no.1
• /
• pp.24-29
• /
• 2000

We propose a simple method to control the crystallization depth of amorphous silicon (a-Si) deposited by PECVD or LPCVD during the excimer laser annealing (ELA). Employing the new method, we have formed poly-Si/a-Si double film and fabricated a new poly-Si TFT with vertical a-Si offsets between the poly-Si channel and the source/drain of TFT without any additional photo-lithography process. The maximum leakage current of the new poly-Si TFT decreased about 80% due to the highly resistive vertical a-Si offsets which reduce the peak electric field in drain depletion region and suppress electron-hole pair generation. In ON state, current flows spreading down through broad a-Si cross-section in the vertical a-Si offsets and the current density in the drain depletion region where large electric field is applied is reduced. The stability of poly-Si TFT has been improved noticeably by suppressing trap state generation in drain region which is caused by high current density and large electric field. For example, ON current of the new TFT decreased only 7% at a stress condition where ON current of conventional TFT decreased 89%.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.18 no.3
• /
• pp.264-268
• /
• 2005

A 2.2-inch QCIF+(176${\times}$RGB${\times}$220) TFT-LCD with integrated row driver was developed using a standard amorphous silicon TFT technology. At low temperature, the integrated row driver operation is dramatically effected by the electron drift mobility reduction(■50 %) and the threshold voltage shift (■1V) of the a-Si TFT. We studied the dependency of circuit design and found that higher on-current circuit is important to guarantee good operation in wide temperature range.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2004.11a
• /
• pp.559-562
• /
• 2004

A 2.2-inch QCIF+ $(176{\times}RGB{\times}220)$ TFT-LCD with integrated row driver was developed using a standard amorphous silicon TFT technology. At low temperature $({\sim}-20^{\circ}C)$, the integrated row driver operation is dramatically effected by the electron drift mobility variation $({\sim}50%)$ and the threshold voltage shift $({\sim}1V)$ of the a-Si TFT. We studied the temperature dependency of the circuit design and found that higher on-current circuit is important to guarantee good operation in wide temperature range.