• 제목/요약/키워드: access timing

검색결과 128건 처리시간 0.023초

Design of a XML-based Data Store Architecture for Run-time Process Monitor (실행시간 프로세스 모니터를 위한 XML 기반의 데이터 저장소의 설계)

  • Jeong, Yoon-Seok;Kim, Tae-Wan;Chang, Chun-Hyon
    • The KIPS Transactions:PartA
    • /
    • 제10A권6호
    • /
    • pp.715-722
    • /
    • 2003
  • Monitoring is used to see if a real-time system provides a service on time. The target of monitoring is not only an interior system but also a remote system which is located in the remote network. Monitoring needs data store to monitor data from each system. But a data store should be designed on the considerations of time constraints and data accessibility. In this paper, we present an architecture of XML-based data store and network delivery. XML-based data store is based on XML which is a standardized data format. So any platform which supports TCP/IP and HTTP can access data in the data store without any conversion. The XML-based delivery architecture is designed to reduce the time of data access and delivery. In addition, some experiments were tested to provide the timing guideline to be kept by a real-time system which uses the architecture presented in this paper. The architecture of XML-based data store and delivery designed in this paper can be used in the domains of remote real-time monitoring and control.

Study on Location Characteristics and Establishment Time of Cherry-blossom Attractions in the Modern Era Busan (근대 부산에서 벚꽃 명소의 입지적 특성과 성립 시기에 관한 연구)

  • Kang, YoungJo
    • Journal of the Korean Institute of Landscape Architecture
    • /
    • 제44권5호
    • /
    • pp.47-58
    • /
    • 2016
  • In modern era Busan, newspaper articles about cherry blossom attractions from FuzanNippo and ChosenJiho have changed from places of landmark cherry trees to recreational activities under the cherry blossom. This means that the place characteristics of the cherry blossom attractions helped transform modern Busan. This study is to clarify the real image of the cherry blossom attractions where they were and when it was established in modern Busan. In order to discuss the location characteristics and the timing of identification as it changed from cherry-blossom viewing spots to picnic spots under the cherry blossom, current articles published in the FuzanNippo and ChosenJiho were collected. This study results are as follows: First of all, cherry blossom attractions are located in private gardens, gardens at hot spring inns, public lands such as schools, temples, reservoirs and malls such as Dongnae hot spring and the Midoricho red-light district. The location feature was that they were found at the edges of settlement environments, at the interface of city and natural spaces in modern Busan. Secondly, newspaper articles about cherry blossom attractions gradually changed from cherry blossom viewing spots to picnic spots under the cherry blossom, which became the peak of the cherry blossom attractions in modern Busan. The main focus of cherry blossom attractions changed from cherry-blossom viewing to picnicking under cherry blossoms around 1920. This means that the establishment of cherry blossom attractions can be seen around 1920. Articles of cherry-blossom viewing picked up sites not easy to access such as private gardens and reservoirs, articles about picnic spots under cherry blossoms noted public places that everyone could access. Cherry blossom attractions sites became spring resorts in modern Busan.

Sea Trial Results of the Direct Sequence Spread Spectrum Underwater Acoustic Communication in the East Sea (동해에서 직접 수열 대역확산 수중음향통신 기법의 해상실험 결과)

  • Han, Jeong-Woo;Kim, Ki-Man;Yun, Yeong-Jung;Mun, Hyeon-Uk;Chun, Seung-Yong;Son, Kweon
    • The Journal of the Acoustical Society of Korea
    • /
    • 제31권7호
    • /
    • pp.441-448
    • /
    • 2012
  • Spread spectrum provides the minimized inter-symbol interference, the low probability of intercept and the multiple access capability. This paper presents a direct sequence spread spectrum with carrier/timing recovery and equalizer which compensates the delay spread caused by multipath transmission. When the sea trials were performed in Korean East Sea, the bit error rates of QPSK and direct sequence spread spectrum are $1.46{\times}10^{-2}$ and $5.17{\times}10^{-4}$ at 3 km source-receiver range, respectively.

Performance Evaluation of a Pilot Interference Cancellation Scheme in a WCDMA Wireless Repeater (WCDMA 무선 중계기에서 파일럿 간섭제거 기법의 성능평가)

  • Kim, Sun-Ho;Shim, Hee-Sung;Im, Sung-Bin
    • Journal of the Institute of Electronics Engineers of Korea TC
    • /
    • 제46권6호
    • /
    • pp.111-117
    • /
    • 2009
  • In the wideband code division access (WCDMA) systems, a pilot channel is used to determine WCDMA network coverage, cell identification, synchronization, timing acquisition and tracking, user-set handoff, channel estimation, and so on. A wireless repeater, which is deployed in the urban area for the WCDMA system to meet the growing demand on wireless communication services, has the possibility to receive several pilot signals from a large number of base stations, however, cannot distinguish its service base station's signal among them. This pilot interference results in frequent handoffs in the user equipment, which degrades the radio reception, transmission efficiency, quality of service, and channel capacity and increases the unwanted power consumption. In this paper, thus, we propose a pilot pollution interference cancellation scheme using one of the adaptive estimation algorithms, normalized least mean square (NLMS), which is applicable to a wireless repeater. We carried out link-level and network-level computer simulations to evaluate the performance of the proposed scheme in a wireless repeater. The simulation results verify the bit error rate (BER) improvement in the link level and the call drop probability improvement in the network level.

Experimental investigation of Scalability of DDR DRAM packages

  • Crisp, R.
    • Journal of the Microelectronics and Packaging Society
    • /
    • 제17권4호
    • /
    • pp.73-76
    • /
    • 2010
  • A two-facet approach was used to investigate the parametric performance of functional high-speed DDR3 (Double Data Rate) DRAM (Dynamic Random Access Memory) die placed in different types of BGA (Ball Grid Array) packages: wire-bonded BGA (FBGA, Fine Ball Grid Array), flip-chip (FCBGA) and lead-bonded $microBGA^{(R)}$. In the first section, packaged live DDR3 die were tested using automatic test equipment using high-resolution shmoo plots. It was found that the best timing and voltage margin was obtained using the lead-bonded microBGA, followed by the wire-bonded FBGA with the FCBGA exhibiting the worst performance of the three types tested. In particular the flip-chip packaged devices exhibited reduced operating voltage margin. In the second part of this work a test system was designed and constructed to mimic the electrical environment of the data bus in a PC's CPU-Memory subsystem that used a single DIMM (Dual In Line Memory Module) socket in point-to-point and point-to-two-point configurations. The emulation system was used to examine signal integrity for system-level operation at speeds in excess of 6 Gb/pin/sec in order to assess the frequency extensibility of the signal-carrying path of the microBGA considered for future high-speed DRAM packaging. The analyzed signal path was driven from either end of the data bus by a GaAs laser driver capable of operation beyond 10 GHz. Eye diagrams were measured using a high speed sampling oscilloscope with a pulse generator providing a pseudo-random bit sequence stimulus for the laser drivers. The memory controller was emulated using a circuit implemented on a BGA interposer employing the laser driver while the active DRAM was modeled using the same type of laser driver mounted to the DIMM module. A custom silicon loading die was designed and fabricated and placed into the microBGA packages that were attached to an instrumented DIMM module. It was found that 6.6 Gb/sec/pin operation appears feasible in both point to point and point to two point configurations when the input capacitance is limited to 2pF.

The Internalization Strategies for Venture Business (벤처기업의 국제화 전략)

  • Kim, Sung-Ho;Kim, Pan-Jin;Na, Seung-Hwa
    • Journal of Distribution Science
    • /
    • 제7권3호
    • /
    • pp.101-122
    • /
    • 2009
  • This study examines internationalization determinant factors, motivation and goal of internalization, market entry methods, timing, region, internalization strategy and access method, internationalization performance and success factors, problems and troubles of internalization, and ultimately suggests internalization strategies for domestic venture companies. The study found that interior factors of internationalization determinant factors are characteristics of new firm and technological capabilities while exterior factors include narrow domestic market, industrialization level, competition level, product life cycle, economy of scale, and global network. Motivation was found to include securing and preoccupying market, cost reduction and efficient production through moving of production base, and the necessity of network formation.

  • PDF

An Improvement MPEG-2 Video Encoder Through Efficient Frame Memory Interface (효율적인 프레임 메모리 인터페이스를 통한 MPEG-2 비디오 인코더의 개선)

  • 김견수;고종석;서기범;정정화
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • 제24권6B호
    • /
    • pp.1183-1190
    • /
    • 1999
  • This paper presents an efficient hardware architecture to improve the frame memory interface occupying the largest hardware area together with motion estimator in implementing MPEG-2 video encoder as an ASIC chip. In this architecture, the memory size for internal data buffering and hardware area for frame memory interface control logic are reduced through the efficient memory map organization of the external SDRAM having dual bank and memory access timing optimization between the video encoder and external SDRAM. In this design, 0.5 m, CMOS, TLM (Triple Layer Metal) standard cells are used as design libraries and VHDL simulator and logic synthesis tools are used for hardware design add verification. The hardware emulator modeled by C-language is exploited for various test vector generation and functional verification. The architecture of the improved frame memory interface occupies about 58% less hardware area than the existing architecture[2-3], and it results in the total hardware area reduction up to 24.3%. Thus, the (act that the frame memory interface influences on the whole area of the video encoder severely is presented as a result.

  • PDF

Effect of Nursing Frequency and Creep Feed Provision on the Milk and Feed Intake and Performance of Zero Day Weaned Piglets Reared on a Dummy Sow

  • Weng, R.C.;Edwards, S.A.;Hsia, L.C.
    • Asian-Australasian Journal of Animal Sciences
    • /
    • 제22권11호
    • /
    • pp.1540-1546
    • /
    • 2009
  • One hundred and forty-four piglets with an average birth weight of 1,672${\pm}$13.4 g were used to evaluate different feeding strategies for piglets reared from birth on a dummy sow. A 3${\times}$2 factorial experiment compared three nursing frequencies (1, 3 or 6 h intervals) and two feeding regimes (milk only, or milk combined with access to creep feed and water). The piglets which were nursed at one hour intervals had the lightest body weights at all days, and the poorest combined milk and creep feed dry matter conversion efficiency to piglet body weight gain in the second week. Piglets which were nursed at 3 h intervals had the heaviest body weight at day 15 and 22, but those nursed at 6 h intervals achieved similar body weight by days 29 (milk withdrawal) and 36. Piglets offered creep feed were observed to wean themselves before cessation of milk availability, and the timing of this self-weaning depended on the nursing frequency. The piglets nursed at one hour intervals weaned themselves between day 22 and day 29, those nursed at 3 h intervals weaned themselves between day 15 and day 22, whilst those nursed at 6 h intervals weaned themselves between day 8 and day 15. The piglets which were nursed at 6 h intervals had the highest total dry matter intake in weeks 3 and 4 when fed with milk, creep feed and water but not when fed milk only. They consequently had the poorest dry matter conversion efficiency in the fourth week and overall when fed with milk, creep feed and water, but not when fed milk only. It is concluded that the optimal management routine under these conditions is a 3 h nursing cycle with provision of supplementary creep feed and water.

Knowledge-based company's technology innovation strategy and case analysis in semiconductor IP industry (반도체 IP 산업에서 지식기반 기업의 기술혁신 전략에 대한 사례연구)

  • Kim, Min-Sik
    • Journal of Korea Technology Innovation Society
    • /
    • 제15권3호
    • /
    • pp.500-532
    • /
    • 2012
  • This study analyzed the technology innovation strategies of knowledge-based companies in the semiconductor IP industry. The theoretical approaches of this study are to i) the creation, protection and utilization of knowledge and innovation, ii) value creation from innovation, iii) modularity, timing of market entry, and the emergence and competition of standard (dominant design). Based on the theoretical analysis, I presented exploratory research hypotheses. Ultimately, this study examined the proposed hypotheses by conducting case studies on the technology innovation strategy of two leading knowledge-based companies in the semiconductor IP industry: ARM and INTEL. First, knowledge-based companies entering in the early stage of the technology cycle select the vertically-integrated technology strategy because of lower access to complementary knowledge assets, and maintain the vertically-integrated technology strategy despite the environmental change-driven differentiation of industry's value chain. Second, knowledge-based companies entering in the later stage of the technology cycle prefer the contract-based technology strategy because of its increased accessibility to complementary knowledge assets, and choose a different path of innovation strategies depending on whether their asset has the feature of discontinuity or not.

  • PDF

Worst Case Response Time Analysis for Demand Paging on Flash Memory (플래시 메모리를 사용하는 demand paging 환경에서의 태스크 최악 응답 시간 분석)

  • Lee, Young-Ho;Lim, Sung-Soo
    • Journal of the Korea Society of Computer and Information
    • /
    • 제11권6호
    • /
    • pp.113-123
    • /
    • 2006
  • Flash memory has been increasingly used in handhold devices not only for data storage, but also for code storage. Because NAND flash memory only provides sequential access feature, a traditionally accepted solution to execute the program from NAND flash memory is shadowing. But, shadowing has significant drawbacks increasing a booting time of the system and consuming severe DRAM space. Demand paging has obtained significant attention for program execution from NAND flash memory. But. one of the issues is that there has been no effort to bound demand paging cost in flash memory and to analyze the worst case performance of demand paging. For the worst case timing analysis of programs running from NAND flash memory. the worst case demand paging costs should be estimated. In this paper, we propose two different WCRT analysis methods considering demand paging costs, DP-Pessimistic and DP-Accurate, depending on the accuracy and the complexity of analysis. Also, we compare the accuracy butween DP-Pessimistic and DP-Accurate by using the simulation.

  • PDF