• 제목/요약/키워드: Without transformer

검색결과 218건 처리시간 0.026초

오류 유형에 따른 생성요약 모델의 본문-요약문 간 요약 성능평가 비교 (Empirical Study for Automatic Evaluation of Abstractive Summarization by Error-Types)

  • 이승수;강상우
    • 인지과학
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    • 제34권3호
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    • pp.197-226
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    • 2023
  • 텍스트 생성요약은 자연어처리의 과업 중 하나로 긴 텍스트의 내용을 보존하면서 짧게 축약된 요약문을 생성한다. 생성요약 과업의 특성 상 본문의 핵심내용을 요약문에서 보존하는 것은 매우 중요하다. 기존의 생성요약 방법론은 정답요약과의 어휘 중첩도(Lexical-Overlap)를 기반으로 본문의 내용과 유창성을 측정했다. ROUGE는 생성요약 요약모델의 평가지표로 많이 사용하는 어휘 중첩도 기반의 평가지표이다. 생성요약 벤치마크에서 ROUGE가 49점대로 매우 높은 성능을 보임에도 불구하고, 생성한 요약문과 본문의 내용이 불일치하는 경우가 30% 가량 존재한다. 본 연구에서는 정답요약의 도움 없이 본문만을 활용해 생성요약 모델의 성능을 평가하는 방법론을 제안한다. 본 연구에서 제안한 평가점수를 AggreFACT의 라벨과 상관도 분석결과, 다음의 두 가지 경우 가장 높은 상관관계를 보였다. 첫 번째는 Transformer 구조의 인코더-디코더 구조에 대규모 사전학습을 진행한 BART와 PEGASUS 등을 생성요약 모델의 베이스라인으로 사용한 경우이고, 두 번째는 요약문 전체에 걸쳐 오류가 발생한 경우이다.

웨이브 디지털 필터의 스케일링에 관한 연구 (A Study on the Scaling in Wave Digital Filter)

  • 권희훈;김명기
    • 한국통신학회논문지
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    • 제12권1호
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    • pp.27-35
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    • 1987
  • 유한어장으로 인하여 디지털 필터에는 반올림한 오차의 잡음과 가산기의 오버플로 문제가 있다. 오버플로가 발생하지 않으면서 내부신호의 레벨을 가능한 최대가 되도록 바꾸기 위하여 행하는 것이 스케일링의 목적이다. 스케일링의 필요조건은 변압기를 사용하여 실현한다. 본 논문에서 오버플로를 피하면서 출력의 SNR을 극대화하는 절차를 제안하였다. 그 결과 스케일링한 경우에 오버플로가 발생하지 않으면서 SNR이 개선되었다.

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Modeling and Analysis of Cascade Multilevel PWM Rectifier Using Circuit DQ Transformation

  • Park, Nam-Sup
    • Journal of information and communication convergence engineering
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    • 제1권3호
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    • pp.163-168
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    • 2003
  • This paper presents a cascade multilevel PWM rectifier without the isolation transformers for energy build-up at each inverter modules. The features and advantages of the proposed PWM rectifier can be summarized as follows; I) It realizes the high power high voltage AC/DC power conversion, 2) It uses no transformer which is bulky and heavy, 3) It has hybrid structure so that switching devices can be effectively utilized, 4) It produces high quality AC current even in high power high voltage applications, 5) The input power factor remains unity by simple modulation index control. The multilevel rectifier is analyzed by using the circuit DQ transformation whereby the characteristics and control equations are obtained. Finally, it will be shown that the system simulation reveals the validity of analyses.

트랜지스터 광대역궤환증폭기 (Transistor Wide-Band Feedback Amplifiers)

  • 이병선;이상배
    • 대한전자공학회논문지
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    • 제5권1호
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    • pp.13-25
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    • 1968
  • 고주파용 transistor를 이용한 광대역증폭기를 hybrid-π 등가회로를 이용하여 상세하게 분석하였다. 저주파와 고주파의 경우에 관한 해석을 하였고 이득과 대역폭및 입력 impedance와 출력 impedance를 주는 식을 유도하였다. 직렬궤환증폭기는 전압원으로 구동하여야하며 저저항부하로 동작시켜야 하고 병렬궤환증폭기는 전류원으로 구동하여야 하며 고저항부하로 동작시켜야 하는 것을 표시하였고 이 두가지 증폭단은 완충증폭단이나 변압기결합을 하지않고 결합시킬 수 있음을 표시하였다.

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통계적 퍼지 함수를 이용한 전력용 변압기 유중가스 판정 시스템 (Dissolved Gas Analysis Interpretation System for Power Transformers using Statical Fuzzy Function)

  • 조성민;김재철;신희상;권동진;구교선
    • 한국조명전기설비학회:학술대회논문집
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    • 한국조명전기설비학회 2007년도 추계학술대회 논문집
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    • pp.275-278
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    • 2007
  • Dissolved gases analysis (DGA) is one of the most useful techniques to detect incipient faults in power transformers. Criteria interpreting DGA result is the most important. Because of difference of operation environment, construction type, oil volume, and etc, the interpretative criteria of DGA at KEPCO must be different with other standard like IEC-60599, Rogers and Doernenburg. In this paper, we collected the DGA data of the normal condition transformers and the incipient fault transformer to suggest the most appropriate criteria. Using these data, this paper suggests appropriate condition classification algorithm. Suggested algorithm can help to detect incipient fault earlier without unnecessary sampling.

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IGBT 인버터제어 TIG용접기 성능개선에 관한 연구 (A Study on the Performance-Improvement of TIG Welder with IGBT Inverter System.)

  • 이정호;김재문;김연충;원충연;김규식;김영렬
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1997년도 하계학술대회 논문집 F
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    • pp.2155-2158
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    • 1997
  • This paper describes the performance improvement of dc TIG (Tungsten Inert Gas) welder. The TIG welder consists of single phase full bridge IGBT inverter which incorporates the high frequency transformer, the boost converter for improving the input power factor, and the arc start system. The arc will be generated without fail even when the extension cable between the torch and the power source is 100m long. In addition, the arc start system with a short dc output voltage will generate less EMI noise than the traditional arc start system with a high frequency output voltage. To demonstrate the practical significance of the proposed methods, some simulation studies are presented.

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A Transformerless Cascade Multilevel PWM Rectifier with Unity Power Factor

  • Choi Nam-Sup
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2001년도 Proceedings ICPE 01 2001 International Conference on Power Electronics
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    • pp.576-580
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    • 2001
  • This paper presents a casca multilevel PWM rectifier without the isolation transformers for energy build-up at each inverter modules; The features and advantages of the proposed PWM rectifier can be summarized as follows; 1) It realizes the high power high voltage AC/DC power conversion, 2) It uses no transformer which is bulky and heavy, 3) It has hybrid structure so that switching devices can be effectively utilized, 4) It produces high quality AC current even in high power high voltage applications, 5) The input power factor remains unity by simple modulation index control. The multilevel rectifier is analyzed by using the circuit DQ transformation whereby the characteristics and control equations are obtained. Finally, it will be shown that the system simulation reveals the validity of analyses

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영전압 스위칭 풀 브릿지 토폴로지를 기반으로 한 새로운 단일 전력 단 역률개선 AC/DC 컨버터 (New Single Stage Power Factor Correction AC/DC Converter based on Zero Voltage Switching Full Bridge Topology)

  • 김태성;구관본;문건우;윤명중
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2003년도 춘계전력전자학술대회 논문집(1)
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    • pp.352-357
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    • 2003
  • A new single stage power factor correction(PFC) AC/DC converter based on zero voltage switching(ZVS) full bridge topology is proposed. Since the series-connected two transformers act as both output inductor and main transformer by turns, the proposed converter has a wide ZVS range without additional devices for ZVS. Furthermore, since there is no need to use an output inductor, the proposed converter features high power density. The proposed converter gives the good power factor correction and low line current harmonics distortion. A mode analysis and experiment results are presented to verify the validity of the proposed converter.

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PCB 캐패시터를 이용한 플라이백 SMPS 출력 리플 저감 대책 (A utilization of PCB capacitor to reduce the output voltage ripple in Flyback SMPS)

  • 김태근;정교범;이완윤
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2003년도 춘계전력전자학술대회 논문집(1)
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    • pp.102-105
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    • 2003
  • The leakage inductance of the High frequency Transformer(HFT) in the flyback topology can be used an inductor of the Low Pass Filter(LPF) to reduce ripple and ripple noise in the output voltage. But, the values of leakage inductance and magnetizing inductance in the HFT are within $\pm20[{\%}]$). And the operating temperature of the HFT increased by the leakage inductance. Therefore, the leakage inductance of the HFT in the flyback topology has minimum and the LPF has non-polarity ceramic capacitor in the output stage. In this paper, the LPF in the flyback topoBogy takes PCB capacitor using double layer of PCB without non-polarity ceramic capacitor. Its experimental results show the reduced ripple noise and the reduced ripple in the output stage.

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A Quadrature VCO Exploiting Direct Back-Gate Second Harmonic Coupling

  • Oh, Nam-Jin
    • Journal of electromagnetic engineering and science
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    • 제8권3호
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    • pp.134-137
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    • 2008
  • This paper proposes a novel quadrature VCO(QVCO) based on direct back-gate second harmonic coupling. The QVCO directly couples the current sources of the conventional LC VCOs through the back-gate instead of front-gate to generate quadrature signals. By the second harmonic injection locking, the two LC VCOs can generate quadrature signals without using on-chip transformer, or stability problem that is inherent in the direct front-gate second harmonic coupling. The proposed QVCO is implemented in $0.18{\mu}m$ CMOS technology operating at 2 GHz with 5.0 mA core current consumption from 1.8 V power supply. The measured phase noise of the proposed QVCO is - 63 dBc/Hz at 10 kHz offset, -95 dBc/Hz at 100 kHz offset, and -116 dBc/Hz at 1 MHz offset from the 2 GHz output frequency, respectively. The calculated figure of merit(FOM) is about -174 dBc/Hz at 1 MHz offset. The measured image band rejection is 46 dB which corresponds to the phase error of $0.6^{\circ}$.