• Journal of the Korea Society of Computer and Information
• /
• v.21 no.3
• /
• pp.1-8
• /
• 2016

The printed circuit board (PCB) can be used only 2 layers of front and back. Therefore, the wiring line segments are located in 2 layers without crossing each other. In this case, the line segment can be appear in both layers and this line segment is to resolve the crossing problem go through the via. The via minimization problem (VMP) has minimum number of via in layout design problem. The VMP is classified by NP-complete because of the polynomial time algorithm to solve the optimal solution has been unknown yet. This paper suggests polynomial time algorithm that can be solve the optimal solution of VMP. This algorithm transforms n-line segments into vertices, and p-crossing into edges of a graph. Then this graph is partitioned into 3-coloring sets of each vertex in each set independent each other. For 3-coloring sets $C_i$, (i=1,2,3), the $C_1$ is assigned to front F, $C_2$ is back B, and $C_3$ is B-F and connected with via. For the various experimental data, though this algorithm can be require O(np) polynomial time, we obtain the optimal solution for all of data.

• Journal of Applied Reliability
• /
• v.5 no.2
• /
• pp.241-259
• /
• 2005

The environmental problem is a main subject of the 21C and an environment destruction phenomenon by various kinds of environmental materials is reaching serious level. Nations to be classified as the environmental developed country, are born again environmental rich country. And they earn a large income by trade Every kind environmental resource in an international commercial transaction. Especially, the study that a reliability assessment method to prevent to reliability problem to be happened when the solder lead(lead-free solder), non-cd component, non-bromide component(without the polybrominated biphenyls(PBB) and polybrominated diphenyl ethers(PBDE))and hexavalent chromium(Cr VI) clearance component and mercury-free applied to electronic equipment is progressed. As the result of the study for applying of a reliability assessment technique of lead-free solder that recognized the most of urgent problem at the company, combination accelerated life test could taken by adding and appling the part of a humidity acceleration part to Eyring Model which is proposed by R.E.Thomas. The reliability assessment methods study of PWB clean environmental materials is expected to respond to a reliability elevation and environmental material regulation policy spreading all over the world by beginning form Europe.

• Journal of the Microelectronics and Packaging Society
• /
• v.8 no.2
• /
• pp.37-42
• /
• 2001

The BGA package has been the area array package of choice for several years. Recently, the transition has been to finer pitch configurations called Chip Scale Packages (CSP). Several of these package types are available at 0.5 mm pitch. requiring surface mount assemblers to evaluate and optimize various elements of the assembly process. This presentation describes the issues associated with making the transition from BGA to CSP assembly. Areas addressed will include the accuracy of pick and place equipment, printed wiring board lines and spaces, PWB vias, in-circuit test issues, solder paste printing, moisture related factors, rework and reliability. The transition to 0.5 mm pitch requires careful evaluation of the board design, solder paste selection, stencil design and component placement accuracy. At this pitch, ball and board pad diameters can be as small as 0.25 mm and 0.20 mm respectively. Drilled interstitial vias are no longer possible and higher ball count packages require micro-via board technology. The transition to CSP requires careful evaluation of these issues. Normal paste registration and BGA component tolerances can no longer achieve the required process levels and higher accuracy pick and place machines need to be implemented. This presentation will examine the optimization of these critical assembly operations, contrast the challenges at 0.5 mm and also look at the continuation of the process to incorporate smaller pitch flip chip devices.

• Journal of the Microelectronics and Packaging Society
• /
• v.19 no.4
• /
• pp.71-78
• /
• 2012

This paper describes trends in conventional scaling compared with advanced technologies such as 3D integration (3DI) and bumpless through-silicon via (TSV) processes, as well as the characteristics of CMOS (Complementary Metal Oxide Semiconductor) Logic device after thinning the wafers to less than $10{\mu}m$. Each module process including thinning, stacking, and TSV, is optimized for 3D Wafer-on-Wafer (WOW) application. Optimization results are discussed with valuable data in detail. Since vertical wiring of bumpless TSV can be connected directly to the upper and lower substrates by self-alignment, bumps are not necessary when TSV interconnects are used.

• Journal of the Korean housing association
• /
• v.21 no.3
• /
• pp.67-76
• /
• 2010

The purposes of this study are to understand residents' needs in regard to living space and to suggest how to provide layout options for the infill, based on their needs, so that the residents can change their living space to suit their own need. This study analyzed residents' needs in terms of living spaces through literature reviews on apartment remodeling and related previous studies. The results are as follows: First, the residents remodeled the various infill, and remodeling works are then classified into five infill groups according to the flexible features: 1) structural elements, such as flooring, ceilings, interior walls, and windows/doors; 2) equipment elements, such as lighting and electricity, electrical wiring, heating arrangements, and water supply & drainage systems: 3) finishing material elements, such as finishing materials for floors, walls, and ceilings, skirting boards, moldings, and art walls; 4) furniture elements, such as built-in wardrobes, storage closets, and kitchen cabinets; and 5) bathroom facility elements such as faucets and sinks. Second, based on the remodeling features, four ways to provide options can be suggested. 1) options are provided for each room; 2) options are provided in connection with structural elements; 3) options are provided for each finishing material element; and 4) options are provided with the combinations of different bathroom facilities.

• Korean Journal of Occupational Health Nursing
• /
• v.20 no.2
• /
• pp.185-194
• /
• 2011

Purpose: Global shortages in nursing and strong demand for nursing services provided Korean nurses with more overseas employment opportunities, especially in the developed countries such as the United States and Canada. The purpose of this study was to explore the ageing experiences of the Korean nurses dispatched to Germany in the 1960s and 1970s. Methods: The researcher interviewed 10 Korean nurses living in four cities in Germany. Interviews were performed twice in January and July, 2010, and the data, in the form of field notes and interview transcripts, were analyzed using the Agar's (1980) ethnographic method. Results: The ageing experiences of the participants can be summarized into three theme stages: coming upon old age, reluctantly realizing getting old, and finally accepting being old. The first stage is characterized by 'wiring money to homeland all throughout youth', second 'still feeling like a stranger anywhere', and finally 'burying homeland in heart'. Conclusion: The research findings not only suggest crucial materials for training prospective nurses overseas for their successful settlement, but also shed lights on related problems and solutions with ageing experience in overseas employment.

• Proceedings of the KIEE Conference
• /
• 1993.11a
• /
• pp.204-206
• /
• 1993

In this paper we represented electroplating process without seed layers for making metal micro structures needed for applying terminal voltage for one-to-one cell fusion system. In this system, we need thick insulator and metal structures because the diameter of a cell is approximately $40{\mu}m$. So, we adopted the photo-sensitive polyimide as electroplating molds and structural material. Generally, the processes utilizing the photo-sensitive polyimide as molds have metal seed layers on the substrate as electroplating electrodes and requires wiring tasks to these seed layers. We proposed electroplating process without any seed layer on the Si-substrate and simulated P-N-P (electrode - Si substrate - electrode) junction on N-type silicon substrate. Leakage current from one metal structure to another which arise when terminal voltage is applied can be remarkably decreased by doping Boron in the region to be electroplated.

• Journal of the Korean Institute of Telematics and Electronics
• /
• v.26 no.5
• /
• pp.117-126
• /
• 1989

In this paper, a new placement algorithm for gate array lay out design is proposed. The proposed algorithm can treat the variable-sized macrocells and by considering the I/Q pad locations, the routing between I/Q pads and the internal region of a chip can be automated effectively. The algorithm is composed of 3 parts. which are initial partitioning, initial placement and placement improvement. In the initial placement phase, a given circuit is partitioned into 5 sub-circuits, by clustering method with considers connectivities of cells not only with I/Q pads but also with related partitioned groups is used repeatedly to assign a unique position to each cell. In the placement improvement phase, the concept of probabilistic wiring density is introduced, and cell moving algorithm is proposed to make the density in a chip even.

• Journal of the Korean Institute of Telematics and Electronics
• /
• v.21 no.4
• /
• pp.72-77
• /
• 1984

A placement program in LSI layout is developed and the results of test are discussed in this paper. In order to achieve 100% wiring, this paper introduces, as a virtual routing method, an algorithm which is close to the real routing. This algorithm is reflected to calculate the channel density. An object function is introduced to achieve minimization of total wire length, number of cuts, and maximum channel density simultaneously. The time complexity for the proposed virtual routing algorithm is O(n2). The time required for the algorithm is very short. This algorithm represents the routing state which is close to minimum wire length. So this algorithm is very proper to the application of placement problem. An auto-placement program is developed by the use of this algorithm. The efficiency of the proposed algorithm is shown in the test of the developed program.

• Coupled systems mechanics
• /
• v.2 no.1
• /
• pp.53-83
• /
• 2013

Sea waves induce significant pressures on coastal surfaces, especially on rocky vertical cliffs or breakwater structures (Peregrine 2003). In the present work, this hydrodynamic pressure is considered as the excitation acting on a piezoelectric material sheet, installed on a vertical cliff, and connected to an external electric circuit (on land). The whole hydro/piezo/electric system is modeled in the context of linear wave theory. The piezoelectric elements are assumed to be small plates, possibly of stack configuration, under a specific wiring. They are connected with an external circuit, modeled by a complex impedance, as usually happens in preliminary studies (Liang and Liao 2011). The piezoelectric elements are subjected to thickness-mode vibrations under the influence of incident harmonic water waves. Full, kinematic and dynamic, coupling is implemented along the water-solid interface, using propagation and evanescent modes (Athanassoulis and Belibassakis 1999). For most energetically interesting conditions the long-wave theory is valid, making the effect of evanescent modes negligible, and permitting us to calculate a closed-form solution for the efficiency of the energy harvesting system. It is found that the efficiency is dependent on two dimensionless hydro/piezo/electric parameters, and may become significant (as high as 30 - 50%) for appropriate combinations of parameter values, which, however, corresponds to exotically flexible piezoelectric materials. The existence or the possibility of constructing such kind of materials formulates a question to material scientists.