• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.29 no.11A
• /
• pp.1263-1270
• /
• 2004

A low-power 64-point FFT/IFFT processor core is designed, which is an essential block in OFDM-based wireless LAM modems. The radix-2/418 DIF (Decimation-ln-Frequency) FFT algorithm is implemented using R2SDF (Radix-2 Single-path Delay Feedback) structure. Some design techniques for low-power implementation are considered from algorithm level to circuit level. Based on the analysis on infernal data flow, some unnecessary switching activities have been eliminated to minimize power dissipation. In circuit level, constant multipliers and complex-number multiplier in data-path are designed using truncation structure to reduce gate counts and power dissipation. The 64-point FFT/IFFT core designed in Verilog-HDL has about 28,100 gates, and timing simulation results using gate-level netlist with extracted SDF data show that it can safely operate up to 50-MHz＠2.5-V, resulting that a 64-point FFT/IFFT can be computed every 1.3-${\mu}\textrm{s}$. The functionality of the core was fully verified by FPGA implementation using various test vectors. The average SQNR of over 50-dB is achieved, and the average power consumption is about 69.3-mW with 50-MHz＠2.5-V.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• 2004.05b
• /
• pp.724-727
• /
• 2004

With the development of modem communication and networking technology, more and more computing and communication facilities, automation equipments, hone information appliances and different type of networking terminals come into home all over the world. The user can control information appliances in home environments. The home environment can communicate with the external network via phone line, wired LAN, wireless LAN, or mixed. However, home information appliances that are connected to the external network are under attack and need to be secured. So specifying suitable security requirements and policies for digital home environment is critical in hone networking environments. This paper analyzes the possible vulnerability to home network, and specifies the security requirements derived from the vulnerability analysis for digital home environment

• Proceedings of the Korea Information Processing Society Conference
• /
• 2002.04b
• /
• pp.1623-1626
• /
• 2002

본 논문에서는 IEEE 802.11a 무선 랜 모뎀에 적용할 파이프 라인구조의 FFT 설계 및 구현에 대해서 제시한다. 구현된 FFT의 기본 구조는 radix-4 Single Delay Format 이나 제안된 나비 연산기에 의해서 복잡도는 radix-2방식과 동일하며 저전력을 고려해서 구현하였다. 구현된 FFT는 $0.35{\mu}m$ LG 라이브러리를 이용하여 합성되었고 64-포인트 FFT/IFFT를 $4{\mu}s$에 수행을 하며 16MHz로 동작을 한다.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.29 no.8C
• /
• pp.1069-1075
• /
• 2004

In this paper, we show the equivalence between complementary code keying (CCK) codeword and coset of the first order Reed-Muller (RM) code with variables of three. The CCK codewords are Golay sequences which have peak-to-average power ratio (PAPR) of two at most and can correct one error. We propose a CCK-orthogonal frequency division multiplexing (OFDM) modem to reduce PAPR. Also, we present the performance improvement techniques by increasing the variables of four to correct three errors and reduce PAPR at least 9㏈ with this system. Although, two Fast Hadamard Transform (FHT) blocks of size 8 64 are required at the receiver, we reduce the complexity by using FHT blocks of size 8 64 and 2 4 without deteriorating the performance. We generalize our results that we may increase the variables of RM code to enhance the error correcting and PAPR reduction capabilities without increasing receiver's complexity.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.30 no.5C
• /
• pp.329-337
• /
• 2005

In this paper, we propose a new type of RAKE receiver for complementary code keying (CCK) codes, which is suitable for the multipath channel with large delay spread. Our proposed system is based on channel matched filter (CMF) with decision feedback equalizer (DFE) and contains codeword DFE structure. In our system, inter chip interference (ICI) and inter symbol interference (ISI) generated due to multipath environments are calculated by using detected CCK codeword. Also it uses the error correcting capability of CCK codes, and it can remove ISI and ICI at the same time.