• ETRI Journal
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• v.34 no.3
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• pp.361-368
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• 2012

A complete high-frequency small-signal circuit model of a 40 Gb/s butterfly electroabsorption modulator integrated laser module is presented for the first time to analyze and optimize its electro-optic (E/O) response and reflection characteristics. An agreement between measured and simulated results demonstrates the accuracy and validity of the procedures. By optimizing the bonding wire length and the impedance of the coplanar waveguide transmission lines, the E/O response increases approximately 5% to 15% from 20 GHz to 33 GHz, while the signal injection efficiency increases from approximately 15% to 25% over 18 GHz to 35 GHz.

• Journal of IKEEE
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• v.7 no.2 s.13
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• pp.230-235
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• 2003

A small and integrated MMIC VCO(Voltage Controlled Oscillator) at Ka-band has been developed. This oscillator was designed as Clapp-Gouriet type scheme, fabricated, and implemented on the carrier. This was connected to an alumna substrate on the carrier providing output port for module, utilizing ribbon and wire bonding technique allowing the loss of 0.2dB. This VCO module showed the excellent performance.

• Structural Engineering and Mechanics
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• v.28 no.6
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• pp.677-694
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• 2008

A vibration power minimization model is developed, based on the mobility matrix method, for a vibration isolation system consisting of a vibrating source placed on an elastic support structure through multiple resilient mounts. This model is applied to investigate the design optimization of an X-Y motion stage-based vibration isolation system used in semiconductor wire-bonding equipment. By varying the stiffness coefficients of the resilient mounts while constraining the dynamic displacement amplitudes of the X-Y motion stage, the total power flow from the X-Y motion stage (the vibrating source) to the equipment table (the elastic support structure) is minimized at each frequency interval in the concerned frequency range for different stiffnesses of the equipment table. The results show that when the equipment table is relatively flexible, the optimal design based on the proposed vibration power inimization model gives significantly little power flow than that obtained using a conventional vibration force minimization model at some critical frequencies. When the equipment table is rigid enough, both models provide almost the same predictions on the total power flow.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.16 no.2
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• pp.1364-1369
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• 2015

As the wire bonding process has been converted into BUMP process due to the high density integration of semiconductor chip, the telecommunication line connecting to semiconductor chip and external devices have become finer. As a result, a more precise work is necessary. However, it is difficult to control quantity given the nature of high viscosity of PSPI and the yield rate continues to decline due to the inflow of bubble. Therefore, this paper developed the D&P(degassing and pumping) system to remove and supply gas that is generated from coating the high viscosity photosensitive polyimide(PSPI) in the semiconductor BUMP process.

• Korean Journal of Metals and Materials
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• v.49 no.11
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• pp.893-899
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• 2011

Fabrication of a complex aluminum alloy by the ARB process using dissimilar aluminum alloys has been carried out. Two-layer stack ARB was performed for up to six cycles at ambient temperature without a lubricant according to the conventional procedure. Dissimilar aluminum sheets of AA1050 and AA5052 with thickness of 1 mm were degreased and wire-brushed for the ARB process. The sheets were then stacked together and rolled to 50% reduction such that the thickness became 1 mm again. The sheet was then cut into two pieces of identical length and the same procedure was repeated for up to six cycles. A sound complex aluminum alloy sheet was successfully fabricated by the ARB process. The tensile strength increased as the number of ARB cycles was increased, reaching 298 MPa after 5 cycles, which is about 2.2 times that of the initial material. The average grain size was $24{\mu}m$ after 1 cycle, and became $1.8{\mu}m$ after 6 cycles.

• Journal of Sensor Science and Technology
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• v.30 no.2
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• pp.88-93
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• 2021

In this paper, a folding sensor based on capacitance is proposed. The sensor was developed to sense the length and angle data for the milli-scale actuators without causing any interference to the actuating joints. For the sensing and testing the robotic joint with reducing the cost and complexity aspects of manufacturing, a simple composition was adopted. The sensor comprises a pair of copper tapes, papers, and wires. The complete sensing unit is constructed by bonding the tapes with the papers and soldering the wire to the copper parts. For accuracy, a teensy 4.0 board, which has a 12-bit ADC resolution, is employed. Furthermore, the sensed analog data is not translated into the unit of capacitance for accuracy; however, it is filtered using a low-pass filter and subsequently, a Butter-worth filter. The data obtained demonstrate a periodic waveform, which implies that the data are in good agreement with the hypothesis set prior to the experiments. Compared to other milli-scale sensors, this could be a better option for sensing the length and angle data for milliscale actuators.

• Journal of Ceramic Processing Research
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• v.13 no.spc2
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• pp.428-432
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• 2012

Polyamidimide (PAI)-colloidal silica (CS) nanohybrid films were synthesized by an advanced sol-gel process. The synthesized PAI-CS hybrid films have a uniform and stable chemical bonding and there is no interfacial defects observed by TEM. The thermal degradation ratio of PAI-CS (10 wt%) hybrid films is delayed by 100 ℃ compared with pure PAI sample determined by on set temperature range in TGA. The dielectric constant of PAI-CS (10 wt%) hybrid films decreases with increasing CS content up to about 5 wt% but increases at higher CS content, which is not explained simply by effective medium therories (EMT). The duration time of PAI-CS (10 wt%) hybrid coil is 38 sec, which is very longer than that of pure PAI coil sample. The PAI-CS (10 wt%) hybrid film has a higher breakdown voltage resistance than the pure PAI film at surge environment and exhibits superior heat resistance. The PAI-CS (10 wt%) sample shows the advanced and stable thermal emission properties in transformer module compared with the pure PAI sample. This result illustrates that the advanced thermal conductivity and expansion properties of PAI-CS sample in the case of appropriate sol-gel processes brings the stable thermal emission in transformer system. Therefore, new PAI-CS hybrid samples with such stable thermal emission properties are expected to be used as a high functional coating application in ET, IT and electric power products.

• Journal of the Semiconductor & Display Technology
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• v.21 no.4
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• pp.45-49
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• 2022

Through Silicon Via (TSV) is a technology that interconnects chips through silicon vias. TSV technology can achieve shorter distance compared to wire bonding technology with excellent electrical characteristics. Due to this characteristic, it is currently being used in many fields that needs faster communication speed such as memory field. However, there is performance degradation issue on TSV technology due to the parasitic capacitance. To deal with this problem, in this study, the parasitic capacitance with TSV design factors is analyzed using commercial tool. TSV design factors were set in three categories: size, aspect ratio, pitch. Each factor was set by dividing the range with TSV used for memory and package. Ansys electronics desktop 2021 R2.2 Q3D was used for the simulation to acquire parasitic capacitance data. DOE analysis was performed based on the reaction surface method. As a result of the simulation, the most affected factors by the parasitic capacitance appeared in the order of size, pitch and aspect ratio. In the case of memory, each element interacted, and in the case of package, it was confirmed that size * pitch and size * aspect ratio interact, but pitch * aspect ratio does not interact.

• ETRI Journal
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• v.46 no.2
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• pp.323-332
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• 2024

Receiver and transmitter monolithic microwave integrated circuit (MMIC) multifunction chips (MFCs) for active phased-array antennas for Ka-band satellite communication (SATCOM) terminals have been designed and fabricated using a 0.15-㎛ GaAs pseudomorphic high-electron mobility transistor (pHEMT) process. The MFCs consist of four-channel radio frequency (RF) paths and a 4:1 combiner. Each channel provides several functions such as signal amplification, 6-bit phase shifting, and 5-bit attenuation with a 44-bit serial-to-parallel converter (SPC). RF pads are implemented on the bottom side of the chip to remove the parasitic inductance induced by wire bonding. The area of the fabricated chips is 5.2 mm × 4.2 mm. The receiver chip exhibits a gain of 18 dB and a noise figure of 2.0 dB over a frequency range from 17 GHz to 21 GHz with a low direct current (DC) power of 0.36 W. The transmitter chip provides a gain of 20 dB and a 1-dB gain compression point (P1dB) of 18.4 dBm over a frequency range from 28 GHz to 31 GHz with a low DC power of 0.85 W. The P1dB can be increased to 20.6 dBm at a higher bias of +4.5 V.

• Journal of the Microelectronics and Packaging Society
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• v.7 no.3
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• pp.45-54
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• 2000

The effect of electropolishing far stamped leadframe on the removal of the edge burr and residual stress relief was examined. The present study showed that the electropolishing could be used for enhanced surface quality of stamped leadframes. The electropolishing was performed at the condition of 60% phosphoric acid electrolyte, 5 ampere of current and 3 cm electrode gap at $70^{\circ}C$ for 2 minutes for Alloy42 type leadframe, and $50^{\circ}C$ for 1.5 minutes for C-194 type leadframe. The FWHM values from X-ray diffraction showed that residual stress of electropolished leadframe recovered to the level of as-received raw materials and surface roughness measured by using AFM tuned out to be improved by 0.079 $\mu\textrm{m}$ and 0.014 $\mu\textrm{m}$ ($R_{rms}$) far alloy 42 and C-194 type leadframes, respectively. The plated thickness using XRF showed the improved uniformity in thickness variation by 0.4~0.5 $\mu\textrm{m}$ and grain growth, which is favorable for interface adhesion, was also observed from the bake test samples. We could certify dimensional stability of leadframe with inspection by means of 3D-topography and hardness measurements.