• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.22 no.10
• /
• pp.850-853
• /
• 2009

We have optimized the device structure by using the dielectric layer such as anti-reflection thin film to improve the emitting efficiency of white organic light emitting device (WOLED). Basically, dielectric layer with anti-reflection characteristics can enhance the emitting efficiency of WOLED by compensating the refractive index of organic layer, ITO, and Glass. Here, WOLED was designed and optimized by Macleod simulator. The refractive index of 1.74 was calculated for Dielectric layer and was selected as $TiO_2$. The optimal thicknesses of $TiO_2$ and ITO were 119.3 and 166.6 nm, respectively, at the wavelength of 600 nm. The transmittance of ITO was measured with the thickness variation of dielectric layer and ITO in Organic layer/ITO/Dielectric layer structure. The transmittance of ITO was 95.17% and thicknesses of $TiO_2$ and ITO were 119.3 and 166.6 nm, respectively. This result, calculated and measured values were coincided.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.21 no.8
• /
• pp.755-759
• /
• 2008

For the development of a new white dielectric layer in plasma display panel, different $TiO_2$ types as a filler was add to the $Bi_2O_3$-BaO-ZnO glass matrix. The reflectance and dielectric constant of dielectric have been investigated as a function of the mixing content (rutile and anatase), and sintering temperature. The reflectance of dielectric sintered at the 520$^{\circ}C$ appeared most highly and suitable in terms of the adhesion and reflectance of the soda-lime glasses. Also, the thermal expansion coefficient of dielectric was found to be $85.6\times10^{-7}/K$, which was similar to that of the soda-lime glasses. Especially, the dielectric constants were not increased with increasing of $TiO_2$ filler contents.

• 한국정보디스플레이학회:학술대회논문집
• /
• 2006.08a
• /
• pp.125-125
• /
• 2006

We present a low temperature thermal process for the transparent dielectric layer, barrier rib, and white back dielectric layer on the soda-lime glass substrate of the PDP by the $TruNano^{TM}$ processor in combination with a compositional modification to the conventional dielectric pastes. By this method the firing temperature can be lowered by more than $100^{\circ}C$.

• Proceedings of the KIEE Conference
• /
• 2000.07c
• /
• pp.1824-1826
• /
• 2000

Up to date, the dual scanning method has been adopted to decrease address-ing period in AC PDP. In this case, addressing period can be reduced, but the driving circuit cost should be increased. In this study, to increase addressing speed we have studied the relationship between addressing speed and cell structure. That is to say, we varied the thickness of dielectric layer on the front glass, the thickness of white back and the height of barrier rib on the rear glass. So, we found that the addressing time was decreased 4% with decreasing 5um thickness of dielectric layer on the front glass and 2um thickness of white back on the rear glass. Also in case of decreasing the height of barrier rib, addressing time was decreased about 4% per 10um.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.15 no.12
• /
• pp.1065-1069
• /
• 2002

The addressing time should be reduced by modifying cell structure and/or driving method in order to replace the dual scan system by single scan and increase the luminance in large ac plasma display panel(PDP). In this paper, the effects of the addressing time was decreased with decreasing thickness of dielectric layer on the front glass and thickness of white dielectric layer on the rear glass. the decreasing rate were 160ns/10$\mu\textrm{m}$ and 270ns/10$\mu\textrm{m}$, respectively Also in case of decreasing the height of barrier rib, addressing time was decreased at the rate of Sons/10$\mu\textrm{m}$.

• Journal of KIEE
• /
• v.11 no.1
• /
• pp.41-45
• /
• 2001

The addressing time should be reduced by modifying cell structure and/or driving method in order to replace the dual scan system by single scan and increase the luminance in large ac plasma display panel(PDP). In this paper, the effects of the dielectric layer thickness and the barrier rib height on the addressing time of ac PDP are investigated. It is found out that the addressing time was decreased with decreasing thickness of dielectric layer on the front glass and thickness of white dielectric layer on the rear glass. The decreasing rate were 160ns/10${\mu}{\textrm}{m}$ and 270nsd/10${\mu}{\textrm}{m}$, respectively. Also in case of decreasing the height of barrier rib, addressing time was decreased at the rate of 550ns/10${\mu}m$.

• 한국정보디스플레이학회:학술대회논문집
• /
• 2005.07a
• /
• pp.464-467
• /
• 2005

In this paper, we present techniques to manufacture color electronic ink for multi-color electrophoretic display implementation. The charged color pigments have been prepared to have superior affinity for dielectric fluid. White $TiO_2$ nanoparticles were modified with poly(methyl methacrylate) copolymer for a microencapsulated electrophoretic display system, in order to reduce the density mismatch between nanoparticles and dielectric medium. These color balls and white pigment particle suspensions were microencapsulated through the typical microencapsulation technique. We fabricate the microcapsules to the single layer on flexible ITO substrate to test the multi-color electrophoretic display application.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2007.11a
• /
• pp.36-36
• /
• 2007

$R_2O_3$(R=Bi, B)-RO(R=Ba, Zn)를 주성분으로 하는 Pb-free유리프리트에 높은 굴절률을 가지고 있는 $TiO_2$ filler를 첨가하여 PDP용 백색유전체를 제조하였다. $TiO_2$ type, 함량에 따른 백색유전체로의 반사율 및 유전 특성을 조사하였다. 백색유전체를 소성한 결과 rutile과 anatase를 중량비로 75:25로 혼합하여 $520^{\circ}C$에서 소성한 경우 밀도 및 수축율의 변화를 거의 나타나지 않았다. 그러나 $TiO_2$함량이 15wt.%를 혼합하여 첨가했을 경우 반사율은 높고 접합특성 또한 우수하였다. 또한, 유전상수는 $TiO_2$첨가량이 증가함에 따라 증가하는 경향을 나타내었다.

• 한국정보디스플레이학회:학술대회논문집
• /
• 2003.07a
• /
• pp.734-738
• /
• 2003

The addressing time should be reduced by modifying cell and/or driving method in order to replace the dual scan system by single scan and increase the luminance in large ac plasma display panel(PDP). In this paper, the relationships between of discharge cell structure and addressing time in ac PDP are investigated. It is found out that the addressing time was decreased with decreasing gap of ITO electrode and thickness of transparence dielectric layer on the front glass. The decrease rates were 4% per $10{\mu}m$ and 4% per $5{\mu}m$, respectively. Also in cases of decreasing height of barrier rip and thickness of white dielectric layer on the rear glass, addressing times were at the rate of 4% per $10{\mu}m$ and 4% per $2{\mu}m$, respectively.

• Journal of the Korean Institute of Telematics and Electronics A
• /
• v.31A no.5
• /
• pp.101-105
• /
• 1994

The EL lamp have been fabricated by screen printing method. the thickness of BaTiO$_3$ dielectric layer and ZnS:Cu phosphor layer was 20 $\mu$m and 40 $\mu$m, respectively. The threshold voltage of green El lamp was 50 $V_{p-p}$ and the maximum brightness was 13.5 $\mu$ W/cm$^2$ at frequency of 700 Hz and the input voltage of 250 $V_{p-p}$. Also when the Rodamin G6 of 0.02 g was doped, the threshold voltage of white EL lamp was 70 $V_{p-p}$ and the maximum brightness was 34 $\mu$W/cm$^2$.