• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.345-346
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• 2013

InGaN material is being studied increasingly as a prospective material for solar cells. One of the merits for solar cell applications is that the band gap energy can be engineered from 0.7 eV for InN to 3.4 eV for GaN by varying of indium composition, which covers almost of solar spectrum from UV to IR. It is essential for better cell efficiency to improve not only the crystalline quality of the epitaxial layers but also fabrication of the solar cells. Fabrication includes transparent top electrodes and surface texturing which will improve the carrier extraction. Surface texturing is one of the most employed methods to enhance the extraction efficiency in LED fabrication and can be formed on a p-GaN surface, on an N-face of GaN, and even on an indium tin oxide (ITO) layer. Surface texturing method has also been adopted in InGaN-based solar cells and proved to enhance the efficiency. Since the texturing by direct etching of p-GaN, however, was known to induce the damage and result in degraded electrical properties, texturing has been studied widely on ITO layers. However, it is important to optimize the ITO thickness in Solar Cells applications since the reflectance is fluctuated by ITO thickness variation resulting in reduced light extraction at target wavelength. ITO texturing made by wet etching or dry etching was also revealed to increased series resistance in ITO film. In this work, we report a new way of texturing by deposition of thickness-optimized ITO films on ITO nano dots, which can further reduce the reflectance as well as electrical degradation originated from the ITO etching process.

• Journal of the Korean Vacuum Society
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• v.12 no.4
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• pp.263-268
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• 2003

Precise thickness control and excellent properties of silicon nitride thin films are essential for the next-generation semiconductor and display devices. In this study, silicon nitride thin films were deposited by batch-type atomic layer deposition (ALD) method using $SiC1_4$ and $NH_3$ as the precursors at temperatures ranging from 500 to $600^{\circ}C$. Thin film deposition using a batch-type ALD reactor was a layer-by-layer atomic growth by self-limiting surface reactions, and the thickness of the deposited film can be controlled by the number of deposition cycles. The silicon nitride thin films deposited by ALD method exhibited composition, refractive index and wet etch rate similar with those of the thin films deposited by low-pressure chemical vapor deposition method at $760^{\circ}C$. The addition of pyridine mixed with precursors increased deposition rate by 50%, however, the films deposited with pyridine was readily oxidized owing to its unstable structure, which is unsuitable for the application to semiconductor or display devices.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.659-659
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• 2013

Recently, graphene has been intensively studied due to the fascinating physical, chemical and electrical properties. It shows high carrier mobility, high current density, and high thermal conductivity compare with conventional semiconductor materials even it has single atomic thickness. Especially, since graphene has fantastic electrical properties many researchers are believed that graphene will be replacing Si based technology. In order to realize it, we need to prepare the large and uniform graphene. Chemical vapor deposition (CVD) method is the most promising technique for synthesizing large and uniform graphene. Unfortunately, CVD method requires transfer process from metal catalyst. In transfer process, supporting polymer film (Such as poly (methyl methacrylate)) is widely used for protecting graphene. After transfer process, polymer layer is removed by organic solvents. However, it is impossible to remove it completely. These organic residues on graphene surface induce quality degradation of graphene since it disturbs movement of electrons. Thus, in order to get an intrinsic property of graphene completely remove of the organic residues is the most important. Here, we introduce modified wet graphene transfer method without PMMA. First of all, we grow the graphene from Cu foil using CVD method. And then, we deposited several metal films on graphene for transfer layer instead of PMMA. Finally, we fabricate graphene FET devices. Our approaches show low defect density and non-organic residues in comparison with PMMA coated graphene through Raman spectroscopy, SEM and AFM. In addition, clean graphene FET shows intrinsic electrical characteristic and high carrier mobility.

• Membrane Journal
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• v.29 no.2
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• pp.105-110
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• 2019

Porous membranes are widely used in industry for removing particulate matter. Unlike conventional porous membrane fabrication methods, the solution spreading phase separation method can form pores very simply. The first step is to wet the mesh with the support layer, then to let the polysulfone solution flow into a solvent without water. The solvent is readily vaporized and the polysulfone is made into a thin film. When the polysulfone solution is mixed with water to form pores, the pore size can be adjusted according to the concentration ratio of the polysulfone solution. The thickness of the membrane is easily controlled by the concentration of the solution. The porous separator has the formation of meshes intact and is very useful for forming a three-dimensional structure. The solution spreading phase separation method proposed in this study is characterized by its high cost competitiveness compared with conventional membranes due to its low production cost and easy process control.

• Journal of the Korean Wood Science and Technology
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• v.17 no.1
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• pp.3-11
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• 1989

This study was carried out to investigate the physical and mechanical properties. durability of adhesive bond and paint film for the basic data which were required to determine the suitability as a raw material for furniture the laminated veneer lumber (LVL) with pitch pine (Pinus rigida Mill). The results obtained were as follows; 1) The proper pressing time for making the LVL was over 45 second per milimeter of LVL thickness. 2) The bending strength of the LVL was lower than that of the solid wood but the compressive strength of the LVL was similar to that of the solid wood. The strength increased with the decrease of veneer thickness. 3) The impact bending absorbed energy of the LVL was 0 to 0.3 kg.m/$cm^2$ in the direction of parallel to the grain. The energy of the LVL was lower than that of the solid wood (0.68 kg.m/$cm^2$). 4) In warm water soaking and cold-dry tests, delamination of adhered layers surface crack, swelling, and color change were not found when the hot pressing time was over 45 second per milimeter of LVL thickness. As a result of soak under vacuum test shrinkage in the direction of parallel to the grain was about -1.0 percent and. was about 3.0 percent in the direction of the perpendicular to the grain. 6) The film cacks on the LVL's surface after the wet and cold-dry test were not found at all. 7) In the use of the LVL for interior decoration it was considered that the surface of the LVL be overlaid crossly with fancy veneers of birch and paulownia, etc. This cross overlayirg methods have resulted in few cracks on the fancy veneer.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2010.06a
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• pp.11-11
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• 2010

Thin-film-transistors (TFTs) that can be deposited at low temperature have recently attracted lots of applications such as sensors, solar cell and displays, because of the great flexible electronics and transparent. Transparent and flexible transistors are being required that high mobility and large-area uniformity at low temperature [1]. But, unfortunately most of TFT structures are used to be $SiO_2$ as gate dielectric layer. The $SiO_2$ has disadvantaged that it is required to high driving voltage to achieve the same operating efficiency compared with other high-k materials and its thickness is thicker than high-k materials [2]. To solve this problem, we find lots of high-k materials as $HfO_2$, $ZrO_2$, $SiN_x$, $TiO_2$, $Al_2O_3$. Among the High-k materials, $Al_2O_3$ is one of the outstanding materials due to its properties are high dielectric constant ( ~9 ), relatively low leakage current, wide bandgap ( 8.7 eV ) and good device stability. For the realization of flexible displays, all processes should be performed at very low temperatures, but low temperature $Al_2O_3$ grown by sputtering showed deteriorated electrical performance. Further decrease in growth temperature induces a high density of charge traps in the gate oxide/channel. This study investigated the effect of growth temperatures of ALD grown $Al_2O_3$ layers on the TFT device performance. The ALD deposition showed high conformal and defect-free dielectric layers at low temperature compared with other deposition equipments [2]. After ITO was wet-chemically etched with HCl : $HNO_3$ = 3:1, $Al_2O_3$ layer was deposited by ALD at various growth temperatures or lift-off process. Amorphous InGaZnO channel layers were deposited by rf magnetron sputtering at a working pressure of 3 mTorr and $O_2$/Ar (1/29 sccm). The electrodes were formed with electron-beam evaporated Ti (30 nm) and Au (70 nm) bilayer. The TFT devices were heat-treated in a furnace at $300^{\circ}C$ and nitrogen atmosphere for 1 hour by rapid thermal treatment. The electrical properties of the oxide TFTs were measured using semiconductor parameter analyzer (4145B), and LCR meter.

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.344-344
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• 2014

Transparent amorphous oxide semiconductors such as a In-Ga-Zn-O (a-IGZO) have advantages for large area electronic devices; e.g., uniform deposition at a large area, optical transparency, a smooth surface, and large electron mobility >10 cm2/Vs, which is more than an order of magnitude larger than that of hydrogen amorphous silicon (a-Si;H).1) Thin film transistors (TFTs) that employ amorphous oxide semiconductors such as ZnO, In-Ga-Zn-O, or Hf-In-Zn-O (HIZO) are currently subject of intensive study owing to their high potential for application in flat panel displays. The device fabrication process involves a series of thin film deposition and photolithographic patterning steps. In order to minimize contamination, the substrates usually undergo a cleaning procedure using deionized water, before and after the growth of thin films by sputtering methods. The devices structure were fabricated top-contact gate TFTs using the a-IGZO films on the plastic substrates. The channel width and length were 80 and 20 um, respectively. The source and drain electrode regions were defined by photolithography and wet etching process. The electrodes consisting of Ti(15 nm)/Al(120 nm)/Ti(15nm) trilayers were deposited by direct current sputtering. The 30 nm thickness active IGZO layer deposited by rf magnetron sputtering at room temperature. The deposition condition is as follows: a rf power 200 W, a pressure of 5 mtorr, 10% of oxygen [O2/(O2+Ar)=0.1], and room temperature. A 9-nm-thick Al2O3 layer was formed as a first, third gate insulator by ALD deposition. A 290-nm-thick SS6908 organic dielectrics formed as second gate insulator by spin-coating. The schematic structure of the IGZO TFT is top gate contact geometry device structure for typical TFTs fabricated in this study. Drain current (IDS) versus drain-source voltage (VDS) output characteristics curve of a IGZO TFTs fabricated using the 3-layer gate insulator on a plastic substrate and log(IDS)-gate voltage (VG) characteristics for typical IGZO TFTs. The TFTs device has a channel width (W) of $80{\mu}m$ and a channel length (L) of $20{\mu}m$. The IDS-VDS curves showed well-defined transistor characteristics with saturation effects at VG>-10 V and VDS>-20 V for the inkjet printing IGZO device. The carrier charge mobility was determined to be 15.18 cm^2 V-1s-1 with FET threshold voltage of -3 V and on/off current ratio 10^9.

• Korean Journal of Materials Research
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• v.4 no.1
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• pp.63-74
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• 1994

The ultrathin oxide films less than 100$\AA$ were grown by thermal oxidation in $N_2O$ ambient to improve the controllability of thickness, thickness uniformity, process reproducibility and their electrical properties. Oxidation rate was reduced significantly at very thin region due to the formation of oxynitride layer in $N_2O$ ambient and moreover nitridation of the oxide layer was simultaneously accompanied during growth. The nitrogen incorporation in the grown oxide layer was characterized with the wet chemical etch-rate and ESCA analysis of the grown oxide layer. All the oxides thin films grown in $N_2O$, pure and dilute $O_2$ ambients show Fowler-Nordheim electrical conduction. The electrical characteristics of thin oxide films grown in $N_2O$ such as leakage current, electrical breakdown, interface trap density generation due to the injected electron and reliability were better than those in pure or dilute ambient. These improved properties can be explained by the fact that the weak Si-0 bond is reduced by stress relaxation during oxidation and replacement by strong Si-N bond, and thus the trap sites are reduced.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.19 no.6
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• pp.288-292
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• 2009

Hydrophobic/hydrophilic patterned substrates were fabricated on a glass substrate by a liquid phase deposition (LPD) method. Hydrophobic surface was obtained by modifying ZnO thin films with a rough surface using a fluoroalkyltrimethoxysilane (FAS) and hydrophilic surface was prepared by decomposing FAS on an exposed to UV light. The hexagonal ZnO rods were perpendicularly grown by LPD method on glass substrates with a ZnO seed layer. The diameter and thickness of hexagonal ZnO rods were increased as a function of increases of immersion time. The surface morphology, thickness, crystal structure, transmittance and contact angle of prepared ZnO thin films were measured by field emission scanning electron microscopy (FE-SEM), X-ray diffraction (XRD), UV-visible spectrophotometer (UV-vis) and contact angle measurement. Hydrophilic ZnO thin films with a contact angle of $20^{\circ}{\sim}30^{\circ}$ were changed to a hydrophobic surface with a contact angle of $145^{\circ}{\sim}161^{\circ}$ by a FAS surface treatment. Prepared hydrophobic surface was pattered by an irradiation of UV light using shadow mask with $300\;{\mu}m$ or 3 mm dot size. Finally, the hydrophobic surface exposed to UV light was changed to a hydrophilic surface.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.16 no.4
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• pp.2391-2400
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• 2015

Weather proof steels are used for steel bridges due to its high corrosion resistance under atmospheric conditions. However, instead of forming stabilized rust layers, general rust occurs on weather proof steels under high humidity condition close to seawater or shady places. In Japan, therefore, they perform rust stabilization treatment instead of unpainted treatment due to severe atmospheric conditions. However, most of domestic weather proof steels were constructed unpainted in the form of closed box-girder, which makes the periodical repetition of dry and wet hard to occur. For the steel bridges constructed on the Han river, the evaporation of water, dew condensation due to temperature change, and stagnant water due to rain affect harmfully on the formation of passive film on weather proof steels. Thus, in this research, in order to analyze corrosion properties inside the closed box-girder for the unpainted weather proof steel bridge in the waterworks safety zone, multiple ways of analysis such as observation with eyes, cellophane-tape test, steel thickness measurement, surface corrosion potential measurement, electron microscope analysis, and X-ray diffraction analysis of the rust were performed. As a result, unstable rust layer was observed inside the closed box-girder, and severe corrosion was observed on the top and bottom of the flanges due to the effects of stagnant water caused by rain, dew condensation, and de-icing materials.