• Title/Summary/Keyword: Wave Digital Filter

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RADIO ASTRONOMICAL DATA PROCESSING USING MARK5B (MARK5B 시스템을 이용한 전파천문 데이터 처리)

  • Oh, Se-Jin;Yeom, Jae-Hwan;Roh, Duk-Gyoo;Chung, Hyun-Soo;Je, Do-Heung;Kim, Kwang-Dong;Kim, Bum-Koog;Hwang, Cheol-Jun;Jung, Gu-Young
    • Publications of The Korean Astronomical Society
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    • v.21 no.2
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    • pp.95-100
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    • 2006
  • In this paper, we describe the radio astronomical data processing system implementation using Mark5B and its development. KASI(Korea Astronomy and Space Science Institute) is constructing the KVN (Korean VLBI Network) until the end of 2007, which is the first VLBI(Very Long Baseline Interferometery) facility in Korea and dedicated for the mm-wave VLBI observation. KVN will adopt the DAS (Data Acquisition System) consisting of digital filter with various function and 1Gsps high-speed sampler to digitize the radio astronomical data for analyzing on the digital filter system. And the analyzed data will be recorded to recorder up to 1Gbps data rates. To test this, we have implemented the system which is able to process 1Gbps data rates and carried out the data recording experiment.

A real Implemention of an Adaptive Self-tuning Filter Using an NEC 7720 DSP (NEC 7720 DSP를 이용한 적응자기 동조필터의 실시간 구현)

  • 이연석;이상욱;이장규
    • The Transactions of the Korean Institute of Electrical Engineers
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    • v.36 no.5
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    • pp.367-376
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    • 1987
  • In this paper we have disigned and implemented a real time ALE (adaptive line enhancer) using a high speed digital processor,NEC 7720. For the ALE system, we have employed an adaptive LMS(least mean square) algorithm proposed by Widrow and Hoff and a 32-order FIR(finite impulse response) filter. Extensive computer simulations have been performed to investigate the peformance of the ALE and to determine necessary parameters for hardware design. The developed software for an NEC 7720 was tested in real time operation using an NEC7720 hardware emulator. The ALE has been tested by sinusoidal waves and real CW (continuous wave) signals. It was found that the experimental results were well agreed with the computer simulation results. Thus it can be concluded that the ALE is useful for detection and enhancement of a sinusoidal signal which is corrupted by an additive Gaussian noise.

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A New Injection Method of Harmonic Compensation Current by Active AC Power Filter (능동형 교류 전력 필터에 의한 고조파 보상전류의 새로운 주입방식)

  • 박민호;최규하
    • The Transactions of the Korean Institute of Electrical Engineers
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    • v.34 no.9
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    • pp.361-367
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    • 1985
  • A new injection method is proposed for active power filters to eliminate AC harmonics in ac input current of nonlinear loads such as rectifiers. By injecting the PWM current determined by the proposed injection method, all the harmonics up to order nn can be eliminated to exactly zero. This PWM injection current can be generated by sampling total harmonic wave at the rate of M and the sampled values are converted into the proposed PWM wave with N pulse-width variables and adjustable current magnitude Im. These variables are deetermined by solving a set of N nonlinear harmonic equations and the harmonic-elimination characteristics of the new injection are investigated through digital computer sinmulation. Also by comparing between the simulated results and the ones synthesized by data stored in EPROM, the possibility of the suggested injection method can be shown.

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Low-power Lattice Wave Digital Filter Design Using CPL (CPL을 이용한 저전력 격자 웨이브 디지털 필터의 설계)

  • 김대연;이영중;정진균;정항근
    • Journal of the Korean Institute of Telematics and Electronics D
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    • v.35D no.10
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    • pp.39-50
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    • 1998
  • Wide-band sharp-transition filters are widely used in applications such as wireless CODEC design or medical systems. Since these filters suffer from large sensitivity and roundoff noise, large word-length is required for the VLSI implementation, which increases the hardware size and the power consumption of the chip. In this paper, a low-power implementation technique for digital filters with wide-band sharp-transition characteristics is proposed using CPL (Complementary Pass-Transistor Logic), LWDF (Lattice Wave Digital Filter) and a modified DIFIR (Decomposed & Interpolated FIR) algorithm. To reduce the short-circuit current component in CPL circuits due to threshold voltage reduction through the pass transistor, three different approaches can be used: cross-coupled PMOS latch, PMOS body biasing and weak PMOS latch. Of the three, the cross-coupled PMOS latch approach is the most realistic solution when the noise margin as well as the energy-delay product is considered. To optimize CPL transistor size with insight, the empirical formulas for the delay and energy consumption in the basic structure of CPL circuits were derived from the simulation results. In addition, the filter coefficients are encoded using CSD (Canonic Signed Digit) format and optimized by a coefficient quantization program. The hardware cost is minimized further by a modified DIFIR algorithm. Simulation result shows that the proposed method can achieve about 38% reductions in power consumption compared with the conventional method.

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Implementation of a dynamic high-performance Notch Filter for Power-Line Communications (전력선통신을 위한 동적 고성능 Notch Filter 구현)

  • Shin, Seong-Kyun;Lee, Byung-Jin;Jang, Dong-Won;Kim, Kyung-Seok
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.13 no.1
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    • pp.221-227
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    • 2013
  • Recent studies have been conducted on powerline communications as a viable alternative to the spread of the spread of the Internet and the Internet as the chief source of information act in the information age, the internet does not reach local Last Mile Solution. Powerline communication, but because it has been designed to transfer power to the high frequency signal to be sent when the close of wireless communications services impacted. The notch filters of a common way to eliminate the interference are used. In this paper, a dynamic high-performance notch filter applying WDF performance was verified through MATLAB and was implemented using a TI's TMS320C6416T DSP board.

Digital Fractional Order Low-pass Differentiators for Detecting Peaks of Surface EMG Signal (표면 근전도 신호 피이크 검출을 위한 디지털 분수 차수 저역통과 미분기)

  • Lee, Jin;Kim, Sung-Hwan
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.62 no.7
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    • pp.1014-1019
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    • 2013
  • Signal processing techniques based on fractional order calculus have been successfully applied in analyzing heavy-tailed non-Gaussian signals. It was found that the surface EMG signals from the muscles having nuero-muscular disease are best modeled by using the heavy-tailed non-gaussian random processes. In this regard, this paper describes an application of digital fractional order lowpass differentiators(FOLPD, weighted FOLPD) based on the fractional order calculus in detecting peaks of surface EMG signal. The performances of the FOLPD and WFOLPD are analyzed based on different filter length and varying MUAP wave shape from recorded and simulated surface EMG signals. As a results, the WFOLPD showed better SNR improving factors than the existing WLPD and to be more robust under the various surface EMG signals.

Dynamic simulation models for seismic behavior of soil systems - Part I: Block diagrams

  • Sahin, Abdurrahman
    • Geomechanics and Engineering
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    • v.9 no.2
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    • pp.145-167
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    • 2015
  • Digital simulation has recently become the preferred method for designing complex and dynamic systems. Simulation packages provide interactive, block-diagram environment for modeling and simulating dynamic models. The block diagrams in simulation models are flowcharts which describe the components of dynamic systems and their interaction. This paper is the first part of the study for determining the seismic behavior of soil systems. The aim of this part is to present the constructed block diagrams for discrete-time analysis of seismic site amplification in layered media for vertically propagating shear waves. Detailed block diagrams are constructed for single and multiple soil layers by considering wave propagation with and without damping, respectively. The block diagrams for recursive filter to model attenuation in discrete-time form are also constructed. Finite difference method is used for strain calculation. The block diagrams are developed by utilizing Simulink which is a software add-on to Matlab.

Structures and Characteristics of the WDF Using VGIC for VLSI Implementation (전압변환 GIC에 의한 WDF의 VLSI 실현에 적합한 구조 및 특성)

  • 박종연;손태호
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.17 no.10
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    • pp.1081-1091
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    • 1992
  • A new method for designing of WDF(Wave Digital Filter) is proposed, which is based on the digital dependent port adaptor transformed by the VGIC(Voltage Conversion Generalized Impedance Converter). To design the WD-LPF, WD-BPF, WD-HPF, or WD-BRF with CGIC(Current Conversion GIC). we have to use the different structure respectively. But the proposed method to design any types of WDF requires only one universal WDF structure, and this structure is attractive for its VLSI implementation for its simplicity.

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A Development of the Digital Switchboard for the High Voltage Customer (고압전자식 배전반 개발)

  • Byun, Young-Bok;Joe, Ki-Youn;Jyung, Je-Wook
    • Proceedings of the KIEE Conference
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    • 1993.07b
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    • pp.803-805
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    • 1993
  • This paper describes the development of a digital multifunction controller for the protection, measurement and control of the high voltage customer switchboard. The magnitude of the fundamental component is estimated using a simple filter based on cross-correlation with a heptagonal wave. The characteristics of flexible relay functions such as adjustable pickup and time-dial settings, various time-magnitude curve and directional capability including measurement functions are presented. The controller implementation is carried out on two microprocessors for real time operation.

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Digital Control of Low-Frequency Square-Wave Two-Stage Electronic Ballast for HID Lamps with Resonant Ignition and High Efficiency (공진 점등 기능과 효율 향상을 위한 HID 램프의 저주파수 구형파 2단 전자식 안정기)

  • Lee, Woo-Cheol
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.27 no.2
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    • pp.69-76
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    • 2013
  • In this paper, electronic ballast using resonant inverter for HID lamp is designed and implemented. The proposed electronic ballast is used the soft switching technology ZVS(Zero Voltage Switching) to reduce turn-on and turn-off loss. The ignition of proposed electronic ballast is achieved by controlling a full bridge inverter which is consisted of LC filter for resonance. After ignition the ballast operates as a low frequency square wave inverter by controlling a full bridge inverter as a buck converter. After ignition at resonant frequency of $f_o$=160kHz, the switching frequency of a buck converter is consisted of 50kHz of high frequency and 170Hz of low frequency. This is for attenuating high frequency harmonics and avoiding acoustic resonance. The experimental results show that electronic ballast using resonant inverter is operated stably.