• Proceedings of the Korean Society of Precision Engineering Conference
• /
• 2003.06a
• /
• pp.98-101
• /
• 2003

As the ultra precision grinding can be applied to wafering process by the refinement of the abrasive. the development of high stiffness equipment and grinding skill, the conventional wafering process which consists of lapping, etching, 1st, 2nd and 3rd polishing could be exchanged to the new process which consists of precision surface grinding, final polishing and post cleaning. Especially, the ultra precision grinding of wafer improves the flatness of wafer and the efficiency of production. Futhermore, it has been not only used in bare wafer grinding, but also applied to wafer back grinding and SOI wafer grinding. This paper focused on the flatness of the ground wafer. Generally, the ground wafer has concave profile because of the difference of wheel path density, grinding temperature and elastic deformation of the equiptment. Tilting mathod is applied to avoid such non-uniform material removes. So, in this paper, the geometric analysis on grinding process is carried out, and then, we can predict the profile of th ground wafer by using profile simulation.

• Macromolecular Research
• /
• v.11 no.6
• /
• pp.511-513
• /
• 2003

Hydroxyl groups were introduced onto the surface of a silicon wafer by O$_2$ plasma treatment. Poly(l-lactide) (1-PLA) was attached onto the surface-modified silicon wafer by the ring-opening polymerization of l-lactide using the hydroxyl group as an initiator. Lamellar single crystals of 1-PLA were grown directly on the 1-PLA-attached silicon wafer from a 0.025% solution in acetonitrile at 5$^{\circ}C$. A well-separated, lozenge-shaped, monolayered lamellar single crystal was prepared because the 1-PLA-attached silicon wafer acts as an initial nucleus.

• New & Renewable Energy
• /
• v.5 no.1
• /
• pp.26-31
• /
• 2009

The surface etching characteristics of single crystalline silicon wafer were investigated using potassium hydroxide (KOH) and tetramethylammonium hydroxide (TMAH). The saw damage layer was removed after 10min by KOH 45wt% solution at $80^{\circ}C$. The wafer etched at high temperature ($90^{\circ}C$) and in low concentration (4wt%) of TMAH solution showed an increased etch rate of silicon wafer and wavy patterns on the surface. Especially, pyramidal textures were formed in 4wt% TMAH solution without alcohol additives.

• Proceedings of the Korean Institute of Surface Engineering Conference
• /
• 2009.05a
• /
• pp.239-241
• /
• 2009

DRIE(Deep Ion Reactive Etching) 공정은 실리콘 웨이퍼를 식각하는 기술로서 Si wafer 비아 홀 제조에 주로 사용되고 있다. 즉, DRIE 공정은 식각 및 보호층 증착을 반복함으로써 직진성 식각을 가능하게 하는 공정이다. 또한, 3차원 적층 실장에서 Si wafer 비아 홀에 결함없이 효과적으로 구리 충진을 하기 위해서는 직각형 via보다 경사벽을 가진 via가 형상적으로 유리하다. 본 연구에서는 3차원 적층을 위한 Si wafer 비아 홀의 결함 없는 효과적인 구리 충진을 위해, DRIE 공정을 이용하여 기존의 경사벽을 가지는 via 흘 형성 공정보다 더욱 효과적인 공정을 개발하였다.

• Tribology and Lubricants
• /
• v.28 no.6
• /
• pp.272-277
• /
• 2012

Finite element analysis was carried out using wafer-scale and particle-scale models to understand the mechanism of the fast removal rate(edge effect) at wafer edges in the chemical-mechanical polishing process. This is the first to report that a particle-scale model can explain the edge effect well in terms of stress distribution and magnitude. The results also revealed that the mechanism could not be fully understood by using the wafer-scale model, which has been used in many previous studies. The wafer-scale model neither gives the stress magnitude that is sufficient to remove material nor indicates the coincidence between the stress distribution and the removal rate along a wafer surface.

• Proceedings of the Korean Institute of Surface Engineering Conference
• /
• 2007.04a
• /
• pp.111-113
• /
• 2007

Thermal conductivities of copper thin films on silicon wafer was obtained from temperature distribution on the surface of wafer measured by radiation thermometry, when sample was heated with constant temperature ate the both ends in a vacuum and dissipate heat by radiation heat transfer into an environment.

• Korean Journal of Materials Research
• /
• v.23 no.6
• /
• pp.322-328
• /
• 2013

The relationship the between electrical properties and surface roughness (Ra) of a wet-etched silicon wafer were studied. Ra was measured by an alpha-step process and atomic force microscopy (AFM) while varying the measuring range $10{\times}10$, $40{\times}40$, and $1000{\times}1000{\mu}m$. The resistivity was measured by assessing the surface resistance using a four-point probe method. The relationship between the resistivity and Ra was explained in terms of the surface roughness. The minimum error value between the experimental and theoretical resistivities was 4.23% when the Ra was in a range of $10{\times}10{\mu}m$ according to AFM measurement. The maximum error value was 14.09% when the Ra was in a range of $40{\times}40{\mu}m$ according to AFM measurement. Thus, the resistivity could be estimated when the Ra was in a narrow range.

• Journal of the Korean Society of Manufacturing Process Engineers
• /
• v.11 no.1
• /
• pp.1-6
• /
• 2012

The polishing of silicon wafers has an important role in semiconductor manufacturing. Generally, getting a flat surface such as a mirror is the purpose of the process. The wafer surface roughness is affected by many variables such as the characteristics of the carrier head unit, operation, speed, the pad and slurry temperature. Optimum process conditions for experimental temperature, pH value, down-force, slurry ratio are investigated, time is used as a fixed factor. This study carried out a series of experiments at varying platen, chuck rpm and oscillation cpm taking particular note of the difference between the rpm and the affect it has on the surface roughness. In this experiment determine the optimum conditions for polishing silicone wafers.

• Korean Journal of Materials Research
• /
• v.16 no.2
• /
• pp.75-79
• /
• 2006

The effect of ozone and/or ultrasound treatments on the efficiency of slurry removal in post sliced cleaning (PSC) of silicon ingot was studied. Efficiency of slurry removal was evaluated as functions of time, temperature and surfactant with DOE (Design of Experiment) method. Residual slurries were observed on the wafer surface in case of cleaning by ozone or ultrasound separately. However, a clean wafer surface was appeared when cleaned with ozone and ultrasound simultaneously. It has found that cleaning time was the main effect among temperature, time and surfactant. Elevated temperature, addition of surfactant and high ozone concentration helped to accelerate efficient removal of slurry. The improvement of removal efficiency seems to be related to the formation of more active OH radicals. The highly cleaned surface was achieved at 10 wt% ozone, 1 min and 10 vol% surfactant with ultrasound. Application of ozone and ultrasound might be a useful method for PSC process in wafer cleaning.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2003.05b
• /
• pp.31-34
• /
• 2003

The sapphire wafers for blue light emitting devices were manufactured by the implementation of the surface machining technology based on micro-tribology. This process has been performed by chemical and mechanical polishing(CMP) process. The sapphire crystalline wafers were characterized by double crystal X-ray diffraction. The sample quality of sapphire crystalline wafer at surfaces has a full width at half maximum 89 arcses. The surfaces of sapphire wafers were mechanically affected by residual stress and surface default. Sapphire wafers's waveness has higher abrasion rate in the edge of the wafer than its center due to Newton's Ring interference.