• The Transactions of the Korean Institute of Electrical Engineers P
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• v.57 no.3
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• pp.255-259
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• 2008

In this paper, a current-mode integrator for low-voltage, low-power analog integrated circuits is presented. Using the proposed current-mode integrator, the baseband analog filter is designed for WCDMA wireless communication. To verify the proposed current-mode integrator circuit, Hspice simulation using 1.8V TSMC $0.18{\mu}m$ CMOS parameter is performed and achieved 44.9dB gain, 15.7MHz unity gain frequency. The described 3rd-order current-mode baseband analog filter is composed of the proposed current-mode integrator, and SFG(Signal Flow Graph) method is used to realize the baseband filter. The simulated results show 2.12MHz cutoff frequency which is suitable for WCDMA baseband block.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.57 no.3
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• pp.260-264
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• 2008

In this paper, a dual mode baseband analog channel selection filter is described which is designed for the Bluetooth and WCDMA wireless communications. Using the presented current-mode integrator, a dual mode channel selection filter is designed. To verify the current-mode integrator circuit, Hspice simulation using 1.8V Hynix $0.18{\mu}m$ standard CMOS technology was performed and achieved $50.0{\sim}4.3dB$ gain, $2.29{\sim}10.3MHz$ unity gain frequency. The described third-order dual mode analog channel selection filter is composed of the current-mode integrator, and used SFG(Signal Flow Graph) method. The simulated results show 0.51, 2.40MHz cutoff frequency which is suitable for the Bluetooth and WCDMA baseband block each.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.2 s.344
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• pp.34-41
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• 2006

This paper presents a CMOS multi-mode baseband filter architecture to support PDC/GSM/EDGE/WCDMA and its new automatic tuning method. 5-th order Chebyshev low pass filter is designed for implementing the baseband channel-select filter. Capacitors and resistors were shared efficiently between modes to minimize the area. And, the new cut-off frequency tuning method is proposed to compensate the process variation. This method can reduce the area and the noise level due to MOS switches.

• Journal of Korea Multimedia Society
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• v.10 no.1
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• pp.49-57
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• 2007

Recently, CMOS RF integration has been widely explored in the wireless communication area to save cost, power, and chip area. The direct conversion architecture, rather than a more conventional super-het-erodyne, has been an attractive choice for single-chip integration because of its many advantages. However, the direct conversion architecture has several fundamental problems to solve in achieving performance comparable to a super-heterodyne counterpart. In this paper, we describe a programmable filter for mobile communication terminals using a direct conversion architecture. The proposed filter can be implemented with the active-RC filter and programmed to meet the requirements of different communication standards, including GSM, DECT and WCDMA. The filter can be tuned to select a detail frequency by changing the gate voltage of the MOS resistors. The gain of the proposed architecture can be programmed from 27dB to 72dB using the filter gain and VGA in 3dB steps.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.48 no.10
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• pp.53-59
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• 2011

In recent years, mobile communication service is used extensively as a larger service area for the maintenance of quality of service required by the expansion of service areas and As the ever-increasing role in relays, and the location is relatively easy to install and less constrained costs, operating cost savings in terms of ICS(Interference Cancellation System) repeaters are required. However, an adaptive algorithm that is applied when updating the filter due to the increase in volume of operations increase the complexity of hardware implementation is fraught with many difficulties. In this paper, if there is a path that feedback. ICS repeater utilizing baseband signal processing for the removal of interfering signals from the feedback operation, significantly reducing the amount of reducing hardware complexity Complex Singed Signed LMS adaption algorithm is proposed. Proposed algorithm for evaluating the performance of Static channel WCDMA signal environment for the ICS, the results of the simulation algorithm, convergence speed and better performance in therms of convergence errors that are required through the implementation of the operation greatly reduces the amount of hardware complexity able to reduce the effect was visible.