• Proceedings of the IEEK Conference
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• 1999.11a
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• pp.697-700
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• 1999

This Paper presents the design, fabrication, analysis of the measured date of a voltage controlled oscillator(VCO) for the application of Personal Communication Systems. Main VCO circuit consists of self biased emitter resonating circuit with microstrip line resonator on FR4 epoxy substrate. A varactor diode is used for 90MHz frequency tuning with center frequency of 1635MHz Phase noise of -114.67㏈C/Hz at 100KHz off set has been achieved with 3.3 V supply. The size of the fabricated VCO circuit is 1.25 cm$\times$ 1.25 cm.

• KIEE International Transactions on Electrophysics and Applications
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• v.4C no.6
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• pp.306-309
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• 2004

This paper presents a new active antenna consisting of a microstrip patch for the passive radiator, a mixer for frequency conversion, a voltage controlled oscillator (VCO) and a phase detector for phase control. The microwave signal frequency has been converted into intermediate frequency (IF) on the antenna elements by the mixer. The active antenna consists of two ports, the IF port has a transmitted IF signal via power combined to the baseband and the dc control port is under the control of the phase-detector. The input voltage of the VCO is controlled by the phase detector. The scan range of the array is determined by the phase detector and the VCO and is obtained between 30$^{\circ}$ and - 30$^{\circ}$

• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.519-520
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• 2006

In this paper, we propose a voltage-controlled ring oscillator (VCO) for a 900 MHz low-noise fractional-N frequency synthesizer. The VCO delay cell is based on an nMOS source-coupled pair with load elements [1] and a combined tail current sources which consist of a large and a small current source to control the integer and fractional behaviors, respectively. The Spectre simulation results of the scheme in a 0.18um CMOS process show the accurate control of the KVCO better than the conventional one.

• Proceedings of the IEEK Conference
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• 1999.06a
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• pp.353-356
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• 1999

A 3.3V PLL(Phase Locked loop) is designed for a high frequency, low voltage, and low power applications. This paper proposes a new PLL architecture to improve voltage to frequency linearity of VCO(Voltage controlled oscillator) with new delay cell. The proposed VCO operates at a wide frequency range of 30MHz~1㎓ with a good linearity. The DC-DC voltage up/down converter is utilized to regulate the control voltage of the two-stage VCO. The designed PLL architecture is implemented on a 0.6${\mu}{\textrm}{m}$ n-well CMOS process. The simulation results show a locking time of 2.6$\mu$sec at 1Hz, Lock in range of 100MHz~1㎓, and a power dissipation of 112㎽.

• Journal of Multimedia Information System
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• v.5 no.2
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• pp.139-142
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• 2018

This work presents a novel architecture of phase locked loop (PLL) with the current compensating scheme to improve phase noise characteristic. The proposed PLL has two charge pumps (CP), main-CP (MCP) and sub-CP (SCP). The smaller SCP current with same time duration but opposite direction of UP/DN MCP current is injected to the loop filter (LF). It suppresses the voltage fluctuation of LF. The PLL has a novel voltage controlled oscillator (VCO) consisting of a voltage controlled resistor (VCR) and the three-stage ring oscillator with latch type delay cells. The VCR linearly converts voltage into current, and the latch type delay cell has short active on-time of transistors. As a result, it improves phase noise characteristic. The proposed PLL has been fabricated with $0.35{\mu}m$ 3.3 V CMOS process. Measured phase noise at 1 MHz offset is -103 dBc/Hz resulting in 3 dBc/Hz phase noise improvement compared to the conventional PLL.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.37 no.4A
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• pp.214-218
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• 2012

In this paper, we reported on a high performance waveguide VCO(voltage controlled oscillator) for FMCW applications. The waveguide VCO consists of a GaAs Gunn diode, a varactor diode, and two bias posts with low pass filter(LPF). The cavity is designed for fundamental mode at 47 GHz and operated at second harmonic of 94 GHz center frequency. The developed waveguide VCO has 1.095 GHz bandwidth, 590 MHz linearity with 1.69% and output power from 14.86 to 15.93 dBm. The phase noise is under -95 dBc/Hz at 1 MHz offset.

• The Journal of the Korea institute of electronic communication sciences
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• v.16 no.1
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• pp.69-74
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• 2021

This paper introduces a low-power voltage-controlled oscillator(VCO) with filters that consist of resistors and capacitors. The proposed VCO contains a 5-stage current mode buffer, and each buffer cell has a resistor-capacitor filter that connects input and output terminals. The filter adds a zero to the buffer cell. Because the zero moves the oscillation condition to high frequencies, the proposed VCO can generate a high frequency clock with low power consumption. The proposed circuit has been designed with 0.18 ㎛ CMOS process. The power consumption is 9.83 mW at 2.7 GHz. The proposed VCO shows 3.64 pJ/Hz in our simulation study, whereas the conventional circuit shows 4.79 pJ/Hz, indicating that our VCO achieves 24% reduction in power consumption.

• Journal of Sensor Science and Technology
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• v.28 no.2
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• pp.121-126
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• 2019

The voltage-controlled oscillator is one of the fundamental building blocks that determine the signal quality and power consumption in RF transceivers for wireless sensor networks. Ring oscillators are attractive owing to their small form factor and multi-phase capability despite the relatively poor phase noise performance in comparison with LC oscillators. The phase noise of a ring oscillator can be improved by using a coupled structure that works at a lower frequency. This paper introduces a 2.4 GHz low-noise ring oscillator that consists of two 3-stage coupled ring oscillators. Each sub-oscillator operates at 800 MHz, and the multi-phase signals are combined to generate a 2.4 GHz quadrature output. The voltage-controlled ring oscillator designed in a 65-nm standard CMOS technology has a tuning range of 800 MHz and exhibits the phase noise of -104 dBc/Hz at 1 MHz offset. The power consumption is 13.3 mW from a 1.2 V supply voltage.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.9 no.2
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• pp.219-225
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• 1998

A voltage controlled oscillator for the local oscillator in 380 MHz TRS handset is designed and fabricated. To improve the phase noise characteristics, the NEC's 2SC4226 transistor with NF=1.2 at 1 GHz and Toshiba's 1SV229 varactor diode with Q=70 are used. And an inductor of VCO is realized by microstrip line. At the bias condition of 5 V and 10 mA, the output power and phase noise in the operating frequency range of 357∼387 MHz are above 3.7 dBm and 111 dBc/Hz at 12.5KHz offset from the carrier, respectively. And FM sensitivity deviation are within ±0.4 KHz. This VCO is well suited for TRS handset.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.26 no.5
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• pp.492-498
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• 2015

As the integration of circuit components increases steadily, various EMS(Electromagnetic Susceptibility) problems have emerged from integrated circuits and electrical systems. The electromagnetic susceptibility of VCOs(Voltage Controlled Oscillator) is especially critical in RF systems. Therefore, in this paper, through the phase noise theory that models electrical oscillators as linear time variant systems, the EMS characteristics of representative VCO -ring VCO and LC VCO- with 1.2 GHz of reference oscillating frequency are analyzed under the existence of the electromagnetic noise coupled in power supply. An simulation algorithm is developed to extract impulse response function based on the phase noise theory. When there is no supply noise, the magnitude of the jitter of two oscillators were similar to around 2.1 ps, but in presence of supply noise, the jitter was significantly lower in LC VCOs than ring VCOs.