• 전기전자학회논문지
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• 제26권2호
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• pp.271-279
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• 2022

본 논문은 플로팅 커패시터를 갖는 이중 인버터의 향상된 데드 타임 보상 기법을 제안한다. 플로팅 커패시터를 갖는 이중 인버터는 2-레벨 단일 인버터보다 전력 반도체가 6개가 추가된다. 전력 반도체의 수가 증가로 이중 인버터의 출력 전압은 추가된 전력 반도체의 도통 전압만큼 감소되며 출력 전류 품질은 전력 반도체에 의한 전압 강하와 데드 타임에 의해 저하된다. 본 논문에서 제안하는 기법은 이중 인버터의 데드 타임 및 전력 반도체의 도통 전압을 보상하여 전류 품질을 개선하고 추가적인 대역통과 필터를 이용한 고조파 보상 기법을 통해 데드 타임과 도통 전압 보상에 대한 오차를 추가 보상한다.

• 조명전기설비학회논문지
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• 제18권2호
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• pp.68-74
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• 2004

본 논문에서는 고조파를 저감시키고 출력파형 개선을 위한 방법으로 입력측 DC링크 전압의 조합을 이용한 새로운 하이브리드형 멀티레벨 인버터를 제안한다. 제안한 인버터는 단상 풀-브릿지 인버터 모듈로 구성된 3개의 H-bridge cell로 구성되어 있다. 2개의 풀-브릿지 모듈은 레벨생성을 위해 사용되고 나머지 하나의 모듈은 PWM 스위칭 동작에 사용되어진다. 레벨 생성을 위한 인버터에 의해 9레벨이 생성되고 PWM 동작을 위한 인버터에 의해 2레벨이 더해지게 되어 결과적으로 총 11레벨의 출력전압을 생성시킬 수 있다. 제안한 시스템의 기본적인 동작원리를 상세하게 설명하고 PSpice 시뮬레이션과 시작품을 이용한 실험을 통해 타당성을 증명할 수 있었다.

• 대한전기학회논문지:전기기기및에너지변환시스템부문B
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• 제53권2호
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• pp.114-122
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• 2004

This paper presents a novel single-stage active-clamp type high frequency resonant inverter. The proposed topology is integrated full-bridge boost rectifier as power factor corrector and active-clamp type high frequency resonant inverter into a single-stage. The input stage of the full-bridge boost rectifier works in discontinuous conduction mode(DCM) with constant duty cycle and variable switching frequency. So that a boost converter makes the line current follow naturally the sinusoidal line voltage waveform. By adding additional active-clamp circuit to conventional class-E high frequency resonant inverter, main switch of inverter part operates not only at Zero-Voltage-Switching mode but also reduces the switching voltage stress of main switch. Simulation results have demonstrated the feasibility of the proposed high frequency resonant inverter. Characteristics values based on characteristics estimation through circuit analysis is given as basis data in design procedure. Also, experimental results are presented to verify theoretical discussion. This proposed inverter will be able to be practically used as a power supply in the fields of induction heating applications, fluorescent lamp and DC-DC converter etc.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1996년도 추계학술대회 논문집 학회본부
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• pp.339-342
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• 1996

Driving the electrodeless fluorescent lamp, the high ac voltage with high frequency is required. The linear power amplifier has been widely used as a driving circuit of electrodeless fluorescent lamp. However, the low efficiency of the power amplifier causes the driving circuit to be replaced by a PWM switching inverter. In order to use a PWM switching inverter as the driving circuit of an electrodeless fluorescent lamp, the high switching frequency is required. But due to the switching loss at switches of the inverter, the limitation of high switching frequency appears in the inverter. One solution to this limitation is to reduce the switching loss by using the zero voltage switching technique. In this paper, zero voltage switching resonant inverter for driving an electrodeless fluorescent lamp is discussed. The results of analysis about the inverter are presented and the equations for design are established. And the validity of the analyzed results are verified through the experiment.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2005년도 추계학술대회 논문집 전기기기 및 에너지변환시스템부문
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• pp.326-328
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• 2005

In order to reduce the capital and overall operating cost of a fuel-cell system, a high-efficiency fuel-cell power inverter with a simple framework is required. The high-order two-inductance two-capacitance (LLCC) resonant technique is adopted in this study to implement a low-frequency 60-Hz sine wave voltage inverter utilized in the proton exchange membrane fuel-cell (PEMFC) system. The methodology for inverting dc voltage into low-frequency ac boltage is usually generated by the pulse-width-modulation (PWM) technique. However, the PWM-type inverter output has high-frequency harmonic components. Although an adequately designed filter could be utilized to overcome this problem, there are still some undesirable effects introduced by the high-frequency switching loss, electromagnetic-interference, harmonic current, and load variation. A novel power inverter via the LLCC resonant technique is designed for inverting dc voltage into 60-Hz ac sine wave voltage in the PEMFC system. This circuit scheme has the merits of low harmonic components, soft switching, high efficiency, and simplified implementation. The effectiveness of the proposed resonant inverter used for the PEMFC system is verified by numerical simulations and experimental results.

• 전력전자학회논문지
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• 제27권2호
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• pp.126-133
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• 2022

This study proposes a suppression of zero sequence current (ZSC), which is caused by zero sequence voltage (ZSV) for a dual two-level inverter with single DC bus. Large output voltages enable the dual inverter with single DC bus to improve a system efficiency compared with single inverter. However, the structure of dual inverter with single DC bus inevitably generates ZSC, which reduces the system efficiency and causes a current ripple. ZSV is also produced by dead time, and its magnitude is determined by the DC bus and current direction. This study presents a novel space vector modulation method that allows the instantaneous suppression of ZSC. Based on a condition where a switching period is twice a sampling (control) period, the proposed control method is implemented by injecting the offset voltage at the primary inverter. This offset voltage is injected in half of the switching period to suppress the ZSC. Simulation and experiments are used to compare the proposed and conventional methods to determine the ZSC suppression performance.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2001년도 Proceedings ICPE 01 2001 International Conference on Power Electronics
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• pp.301-303
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• 2001

In this paper we present a Capacitor Charging Power Supply (CCPS) using a series-resonant three-level inverter topology to improve voltage regulation and use semiconductor switches having low blocking voltage capability such as MOSFETs. This inverter can be operated with two modes, Full Power Mode (FPM) and Half Power Mode (HPM). In FPM inverter supplies the high frequency step up transformer with full DC-link voltage and in HPM with half DC-link voltage. HPM switching method will be adopted when CCPS output voltage reaches the preset target value and operates in refresh mode-charge is maintained on the capacitor. In this topology each semiconductor devices blocks a half of the DC-link voltage[2]. A 15kW, 30kV CCPS has been built and will be tested for an electric precipitator application. The CCPS operates from an input voltage of 500VDC and has a variable output voltage between 10 to 30kV and 1kHz repetition rate at 44nF capacitive load [3]. A resonant frequency of 67.9kHz was selected and a voltage regulation of $0.83\%$ has been achieved through the use of half power mode without using the forced cut off the switch current [1]. The theory of operation, circuit topology and test results are given.

• Journal of Electrical Engineering and Technology
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• 제3권4호
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• pp.546-551
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• 2008

In this paper, a flux-lock type superconducting fault current limiter(SFCL) integrated with a voltage-controlled voltage source inverter(VC-VSI) is proposed. The suggested equipment, which consists of a flux-lock type SFCL and a VCVSI, can perform the fault current limiting operation from the occurrence of a short-circuit. In addition, it can compensate the reactive power that the non-linear load requires and also perform the uninterruptible power supply(UPS) as well as the load voltage stabilization by controlling the amplitude and the phase of the inverter's output voltage. The specification for a test model was determined and its various functions such as the fault current limiting and the power conditioning operations were presented and analyzed via computer simulation. Through the analytical results based on the computer simulation, the validity of the analysis was confirmed and its multi-operation was discussed.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2001년도 Proceedings ICPE 01 2001 International Conference on Power Electronics
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• pp.236-241
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• 2001

This paper presents a novel prototype of active voltage-clamping capacitor-assisted edge resonant soft switching PWM inverter operating at a constant frequency variable power (VPCF) regulation scheme, which is suitable for consumer high-power induction-heating cooking appliances. New generation IGBT with a trench gate is particularly improved in order to reduce conduction loss due to its lowered saturation voltage characteristics. The soft switching load resonant and quasi-resonant inverter designed distinctively using the latest IGBTs is evaluated from an experimental point of view.

• 전기학회논문지
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• 제60권5호
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• pp.971-976
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• 2011

This paper proposes a test system for a valve and poles building blocks used for large scale inverters such as STATCOM, SSSC, UPFC and VSC HVDC. Power semiconductors in the valve are normally connected in series to withstand switching voltage much larger than the voltage rating of a single power semiconductor. Therefore, there is a need to verify if the dynamic voltage sharing during switching in a valve is satisfactory. In this paper, we propose a test system that provides the necessary test condition: voltage and current in the valve using resonant circuits. A test scheme for a single phase inverter consisting two poles is also proposed. The performance of the inverter pole has to be verified at the factory test, before the system is installed at the site to secure the reliability of the system. The proposed scheme makes it possible to confirm if the pole can withstand voltage and current switching condition and handle loss.