• Title/Summary/Keyword: Voltage control strategy

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The Arcing Faults Simulation and Adaptive Autoreclosure Strategy for 765 kV Transmission Line Protection (765 kV 송전선로 보호를 위한 아크사고 시뮬레이션 및 적응적 자동재폐로 대책)

  • Ahn, Sang-Pil;Kim, Chull-Hwan
    • The Transactions of the Korean Institute of Electrical Engineers A
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    • v.48 no.11
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    • pp.1365-1373
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    • 1999
  • In many countries including Korea, in order to transmit the more electric power, the higher transmission line voltage is inevitable. So, a rapid reclosing scheme is important for EHV/UHV transmission lines to ensure requirements for high reliability of main lines. A critical aspect of reclosing operation is the extinction of the secondary arc since it must extinguish before successful reclosure can occur. Therefore the accurate simulation techniques of arcing faults are of importance. And successful reclosing switching can be accomplished by adopting a proper method such as HSGS and hybrid scheme to reduce the secondary arc extinction time. First of all, this paper discusses a suggested arc model, which have time dependent resistance for primary arc and piecewise linear approximated arc model for secondary arc. And this simulation technique is applied to Korean 765 kV transmission lines. Also hybrid scheme is simulated and evaluated for the purpose of shortening dead time. For adaptive reclosing scheme, variable dead time control algorithm is suggested. Two kinds of algorithm are tested. One is max tracking algorithm and the other is rms tracking algorithm. According to simulation results, rms tracking has less errors than max tracking. Therefore rms tracking is applied to Korean 765 kV transmission lines with hybrid scheme.

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A New Design for Cascaded Multilevel Inverters with Reduced Part Counts

  • Choupan, Reza;Nazarpour, Daryoush;Golshannavaz, Sajjad
    • Transactions on Electrical and Electronic Materials
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    • v.18 no.4
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    • pp.229-236
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    • 2017
  • This paper deals with the design and implementation of an efficient topology for cascaded multilevel inverters with reduced part counts. In the proposed design, a well-established basic unit is first developed. The series extension of this unit results in the formation of the proposed multilevel inverter. The proposed design minimizes the number of power electronic components including insulated-gate bipolar transistors and gate driver circuits, which in turn cuts down the size of the inverter assembly and reduces the operating power losses. An explicit control strategy with enhanced device efficiency is also acquired. Thus, the part count reductions enhance not only the economical merits but also the technical features of the entire system. In order to accomplish the desired operational aspects, three algorithms are considered to determine the magnitudes of the dc voltage sources effectively. The proposed topology is compared with the conventional cascaded H-bridge multilevel inverter topology, to reflect the merits of the presented structure. In continue, both the analytical and experimental results of a cascaded 31-level structure are analyzed. The obtained results are discussed in depth, and the exemplary performance of the proposed structure is corroborated.

A Novel Analytical Method for Selective Harmonic Elimination Problem in Five-Level Converters

  • Golshan, Farzad;Abrishamifar, Adib;Arasteh, Mohammad
    • Journal of Power Electronics
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    • v.17 no.4
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    • pp.914-922
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    • 2017
  • Multilevel converters have attracted a lot of attention in recent years. The efficiency parameters of a multilevel converter such as the switching losses and total harmonic distortion (THD) mainly depend on the modulation strategy used to control the converter. Among all of the modulation techniques, the selective harmonic elimination (SHE) method is particularly suitable for high-power applications due to its low switching frequency and high quality output voltage. This paper proposes a new expression for the SHE problem in five-level converters. Based on this new expression, a simple analytical method is introduced to determine the feasible modulation index intervals and to calculate the exact value of the switching angles. For each selected harmonic, this method presents three-level or five-level waveforms according to the value of the modulation index. Furthermore, a flowchart is proposed for the real-time implementation of this analytical method, which can be performed by a simple processor and without the need of any lookup table. The performance of the proposed algorithm is evaluated with several simulation and experimental results for a single phase five-level diode-clamped inverter.

Digital Implementation of Optimal Phase Calculation for Buck-Boost LLC Converters

  • Qian, Qinsong;Ren, Bowen;Liu, Qi;Zhan, Chengwang;Sun, Weifeng
    • Journal of Power Electronics
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    • v.19 no.6
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    • pp.1429-1439
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    • 2019
  • Buck-Boost LLC (BBLLC) converters based on a PWM + phase control strategy are good candidates for high efficiency, high power density and wide input range applications. Nevertheless, they suffer from large computational complexity when it comes to calculating the optimal phase for ZVS of all the switches. In this paper, a method is proposed for a microcontroller unit (MCU) to calculate the optimal phase quickly and accurately. Firstly, a 2-D lookup table of the phase is established with an index of the input voltage and output current. Then, a bilinear interpolation method is applied to improve the accuracy. Meanwhile, simplification of the phase equation is presented to reduce the computational complexity. When compared with conventional curve-fitting and LUT methods, the proposed method makes the best tradeoff among the accuracy of the optimal phase, the computation time and the memory consumption of the MCU. Finally, A 350V-420V input, 24V/30A output experimental prototype is built to verify the proposed method. The efficiency can be improved by 1% when compared with the LUT method, and the computation time can be reduced by 13.5% when compared with the curve-fitting method.

PR Controller Based Current Control Scheme for Single-Phase Inter-Connected PV Inverter (PR제어기를 이용한 단상 계통 연계형 태양광 인버터 설계)

  • Vu, Trung-Kien;Seong, Se-Jin
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.10 no.12
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    • pp.3587-3593
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    • 2009
  • Nowadays, the PV systems have been focused on the interconnection between the power source and the grid. The PV inverter, either single-phase or three-phase, can be considered as the core of the whole system because of an important role in the grid-interconnecting operation. An important issue in the inverter control is the load current regulation. In the literature, the Proportional+Integral (PI) controller, normally used in the current-controlled Voltage Source Inverter (VSI), cannot be a satisfactory controller for an ac system because of the steady-sate error and the poor disturbance rejection, especially in high-frequency range. By comparison with the PI controller, the Proportional+Resonant (PR) controller can introduce an infinite gain at the fundamental ac frequency; hence can achieve the zero steady-state error without requiring the complex transformation and the dq-coupling technique. In this paper, a PR controller is designed and adopted for replacing the PI controller. Based on the theoretical analyses, the PR controller based control strategy is implemented in a 32-bit fixed-point TMS320F2812 DSP and evaluated in a 3kW experimental prototype Photovoltaic (PV) power conditioning system (PCS). Simulation and experimental results are shown to verify the performance of implemented control scheme in PV PCS.

Chronic postsurgical pain: current evidence for prevention and management

  • Thapa, Parineeta;Euasobhon, Pramote
    • The Korean Journal of Pain
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    • v.31 no.3
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    • pp.155-173
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    • 2018
  • Chronic postsurgical pain (CPSP) is an unwanted adverse event in any operation. It leads to functional limitations and psychological trauma for patients, and leaves the operative team with feelings of failure and humiliation. Therefore, it is crucial that preventive strategies for CPSP are considered in high-risk operations. Various techniques have been implemented to reduce the risk with variable success. Identifying the risk factors for each patient and applying a timely preventive strategy may help patients avoid the distress of chronic pain. The preventive strategies include modification of the surgical technique, good pain control throughout the perioperative period, and preoperative psychological intervention focusing on the psychosocial and cognitive risk factors. Appropriate management of CPSP patients is also necessary to reduce their suffering. CPSP usually has a neuropathic pain component; therefore, the current recommendations are based on data on chronic neuropathic pain. Hence, voltage-dependent calcium channel antagonists, antidepressants, topical lidocaine and topical capsaicin are the main pharmacological treatments. Paracetamol, NSAIDs and weak opioids can be used according to symptom severity, but strong opioids should be used with great caution and are not recommended. Other drugs that may be helpful are ketamine, clonidine, and intravenous lidocaine infusion. For patients with failed pharmacological treatment, consideration should be given to pain interventions; examples include transcutaneous electrical nerve stimulation, botulinum toxin injections, pulsed radiofrequency, nerve blocks, nerve ablation, neuromodulation and surgical management. Physical therapy, cognitive behavioral therapy and lifestyle modifications are also useful for relieving the pain and distress experienced by CPSP patients.

Effect of Annealing Process Pressure Over Atmospheric Pressure on Cu2ZnSn(S,Se)4 Thin Film Growth (대기압 이상의 열처리 공정압력이 Cu2ZnSn(S,Se)4(CZTSSe) 박막 성장에 미치는 영향)

  • Lee, Byeong Hoon;Yoo, Hyesun;Jang, Jun Sung;Lee, InJae;Kim, Jihun;Jo, Eunae;Kim, Jin Hyeok
    • Korean Journal of Materials Research
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    • v.29 no.9
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    • pp.553-558
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    • 2019
  • $Cu_2ZnSn(S,Se)_4(CZTSSe)$ thin film solar cells areone of the most promising candidates for photovoltaic devices due to their earth-abundant composition, high absorption coefficient and appropriate band gap. The sputtering process is the main challenge to achieving high efficiency of CZTSSe solar cells for industrialization. In this study, we fabricated CZTSSe absorbers on Mo coated soda lime glass using different pressures during the annealing process. As an environmental strategy, the annealing process is performed with S and Se powder, without any toxic $H_2Se$ and/or $H_2S$ gases. Because CZTSSe thin films have a very narrow stable phase region, it is important to control the condition of the annealing process to achieve high efficiency of the solar cell. To identify the effect of process pressure during the sulfo-selenization, we experiment with varying initial pressure from 600 Torr to 800 Torr. We fabricate a CZTSSe thin film solar cell with 8.24 % efficiency, with 435 mV for open circuit voltage($V_{OC}$) and $36.98mA/cm^2$ for short circuit current density($J_{SC}$), under a highest process pressure of 800 Torr.

Development of DC/DC Converters and Actual Vehicle Simulation Experiment for 150 kW Class Fuel-cell Electric Vehicle (150kW급 수소연료전지 차량용 DC/DC 컨버터 개발 및 실차모사 실험)

  • Kim, Sun-Ju;Jeong, Hyeonju;Choi, Sewan;Cho, Jun-Ho;Jeon, Yujong;Park, Jun-Sung;Yoon, Hye-Sung
    • The Transactions of the Korean Institute of Power Electronics
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    • v.27 no.1
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    • pp.26-32
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    • 2022
  • This paper proposes a power system that includes a 120k W fuel cell DC-DC converter (FDC) and 30 kW bidirectional DC-DC converter (BHDC) for a 150 kW fuel-cell vehicle. With a high DC link voltage of 800 V, the efficiency and power density of the power electronic components are improved. Through the modular design of FDC and BHDC, electric components are shared, resulting in reduced mass production costs. The switching frequency of 30 kHz of full SiC devices and optimal design of coupled inductor reduce the volume, achieving a power density of 8.3 kW/L. Furthermore, a synergetic operation strategy using variable limiter control of FDC and BHDC was proposed to efficiently operate the fuel cell vehicle considering the fuel cell stack efficiency according to the load. Finally, the performance of the prototype was verified by Highway Fuel Economy Driving Schedule testing, EMI test, and the linked operation between FDC and BHDC. The full load efficiencies of the FDC and BHDC prototypes are 98.47% and 98.74%, respectively.

Economic Assessment of the Battery Energy Storage System with Its Customer Type (수용가 형태에 따른 전지전력저장시스템의 경제성 평가)

  • 손학식;최준호;김재철
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.16 no.2
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    • pp.81-89
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    • 2002
  • The Battery Energy Storage System (BESS) has lots of advantages such as load leveling, quick response emergency power (spinning reserve), frequency and voltage control, improvement of reliability, and deferred generation and transmission construction. However, it is very critical that economic feasibility requires justification from the customer side of meter to promoting the dissemination of BESS in nation widely. In this paper, we proposed the economic assessment model of customer owned BESS which is complemented and improved the existing model. The proposed model is applied to the typical customer types, i.e. light industrial, commercial, and residential, which are taken from the statistical analysis on the load profile survey of Korea Electric Power COmpany (KEPCO). The economic viability performed for each customer load type to justifying their economic feasibility of BESS installation from the economic measures such as payback period, Net Present Worth (NPW), Rate Of Return (ROR). The results show that the BESS has economic benefits to the specific customer type, i.e. residential customer. Therefore, the government and the energy agency should be committing the support program, such as tax incentive, financial support, to disseminate the BESS nation widely. The results of this paper are useful to the customer investment decision-making and the national energy policy & strategy in Korea.