• Journal of the Institute of Electronics Engineers of Korea TE
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• v.37 no.2
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• pp.17-24
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• 2000

In this paper, the stress and transient currents associated with the on and off time of applied voltage were used to measure the density and distribution of high voltage stress induced traps in thin silicon oxide films. The transient currents were due to the discharging of traps generated by high stress voltage in the silicon oxides. The trap distributions were relatively uniform new both cathode and anode interface. The trap densities were dependent on the stress polarity. The stress generated trap distributions were relatively uniform the order of 1011~1021[states/eV/cm2] after a stress voltage. It appear that the stress and transient current that flowed when the stress voltage were applied to the oxide was caused by carriers tunneling through the silicon oxide by the high voltage stress generated traps.

• Journal of the Semiconductor & Display Technology
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• v.4 no.4 s.13
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• pp.1-4
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• 2005

The chemical composition and uniaxial compressive stress are varied to observe their effect on the current-voltage characteristics of ZnO based ceramics. The variation of chemical composition produces two kinds of ceramics showing ohmic and nonohmic current-voltage characteristics. The current at a fixed voltage increased with the increase of the compressive stress for both ohmic and nonohmic ceramics. Ceramics showing nonohmic behavior exhibit better reversible return of current-voltage curve when the applied compressive stress is removed from the ceramics than those showing ohmic behavior do. We found an appropriate chemical composition showing linear relation between current and stress at a fixed voltage. The ceramic materials with an appropriate chemical composition can be used as a potential sensing material in pressure sensors.

• Proceedings of the KIPE Conference
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• 2003.07a
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• pp.294-298
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• 2003

In this paper, the new zero-current-transition (ZCT) circuit cell is proposed. The main switch is turned-off under the zero current and zero voltage condition, and there is no additional current stress and voltage stress in, the main switch and the main diode. The Auxiliary switch is turned-off under the zero voltage condition, and the main diode is turned-on under the zero voltage condition, The resonant current required to obtain the ZCT is small and regenerated to the input voltage source. The operational principles of the boost converter integrated with the proposed ZCT circuit cell is analyzed theoretically and verified by the simulation and experimental result. Index terms - zero-current-transition (ZCT), zero-current- switching (ZCS), zero-voltage-switching (ZVS)

• Transactions on Electrical and Electronic Materials
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• v.4 no.6
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• pp.32-37
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• 2003

In this paper, the trap characteristics of thin silicon oxides is investigated in the ULSI implementation with nano structure transistors. The stress and transient currents associated with the on and off time of applied voltage were used to measure the distribution of high voltage stress induced traps in thin silicon oxide films. The stress and transient currents were due to the charging and discharging of traps generated by high stress voltage in the silicon oxides. The transient current was caused by the tunnel charging and discharging of the stress generated traps nearby two interfaces. The stress induced leakage current will affect data retention in electrically erasable programmable read only memories. The oxide current for the thickness dependence of stress current, transient current, and stress induced leakage currents has been measured in oxides with thicknesses between 113.4nm and 814nm, which have the gate area 10$\^$-3/ $\textrm{cm}^2$. The stress induced leakage currents will affect data retention, and the stress current and transient current is used to estimate to fundamental limitations on oxide thicknesses.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.29 no.10
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• pp.595-600
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• 2016

In this paper, the oxide currents of thin silicon oxides is investigated. The oxide currents associated with the on time of applied voltage were used to measure the distribution of voltage stress induced traps in thin silicon oxide films. The stress induced leakage currents were due to the charging and discharging of traps generated by stress voltage in the silicon oxides. The stress induced leakage current will affect data retention in memory devices. The oxide current for the thickness dependence of stress current and stress induced leakage currents has been measured in oxides with thicknesses between $109{\AA}$, $190{\AA}$, $387{\AA}$, and $818{\AA}$ which have the gate area $10^{-3}cm^2$. The oxide currents will affect data retention and the stress current, stress induced leakage current is used to estimate to fundamental limitations on oxide thicknesses.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.07a
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• pp.428-431
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• 2003

In this paper, the stress induced leakage currents of thin silicon oxides is investigated in the ULSI implementation with nano structure transistors. The stress and transient currents associated with the on and off time of applied voltage were used to measure the distribution of high voltage stress induced traps in thin silicon oxide films. The stress and transient currents were due to the charging and discharging of traps generated by high stress voltage in the silicon oxides. The transient current was caused by the tunnel charging and discharging of the stress generated traps nearby two interfaces. The stress induced leakage current will affect data retention in electrically erasable programmable read only memories. The oxide current for the thickness dependence of stress current, transient current, and stress induced leakage currents has been measured in oxides with thicknesses between $113.4{\AA}$ and $814{\AA}$, which have the gate area 10-3cm2. The stress induced leakage currents will affect data retention and the stress current, transient current is used to estimate to fundamental limitations on oxide thicknesses.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.54 no.11
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• pp.540-546
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• 2005

This paper presents a boost circuit topology driving in high - frequency It solves the problem which arised from hard-switching in high-frequency using a period of resonant circuit and operating under the principle of ZCS turn-on and ZCZVS turn-off commutation schemes. In the existing circuit, it has the high voltage and current stress in free- wheeling diode. But in the proposed circuit, it has voltage and current stress which is lower than voltage and current stress of existing circuit with modifing a location of free-wheeling diode. In this paper, it explained the circuit operation of each mode and the waveform of each mode. Also the experiment results compare the voltage and current stress of free-wheeling diode in the existing circuit with the voltage and current stress of that in the proposed circuit. Moreover, it compares and analyzes the proposed circuit's efficiency with the existing circuit's efficiency according to the change of load current.

• Proceedings of the IEEK Conference
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• summer
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• pp.209-212
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• 2004

In this paper, The stress induced leakage currents of thin silicon oxides is investigated in the nano scale structure implementation for Soc. The stress and transient currents associated with the on and off time of applied voltage were used to measure the distribution of high voltage stress induced traps in thin silicon oxide films. The stress and transient currents were due to the charging and discharging of traps generated by high stress voltage in the silicon oxides. The channel current for the thickness dependence of stress current, transient current, and stress induced leakage currents has been measured in oxides with thicknesses between $41\square\;and\;113.4\square,$ which have the channel width x length 10x1um, respectively. The stress induced leakage currents will affect data retention and the stress current, transient current is used to estimate to fundamental limitations on oxide thicknesses. The weight value of synapse transistor was caused by the bias conditions. Excitatory state and inhitory state according to weighted values affected the channel current. The stress induced leakage currents affected excitatory state and inhitory state.

• Journal of Power Electronics
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• v.3 no.4
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• pp.215-223
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• 2003

In this paper, a new zero-current-transition (ZCT) circuit cell is proposed. The main switch is turned-off under the zero current and zero voltage condition, and there is no additional current stress and voltage stress in the main switch and the main diode, respectively. The auxiliary switch is turned-off under the zero voltage condition, and the main diode is turned-on under the zero voltage condition. The resonant current required to obtain the ZCT condition is relatively small and regenerated to the input voltage source. The operational principles of a boost converter integrated with the proposed ZCT circuit cell are analyzed and verified by the simulation and experimental results.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.26 no.4
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• pp.57-66
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• 2012

When typical Z-source DC/AC inverter(ZSI) is operated in high voltage gain area, because of its high duty ratio, voltage and current stress in Z-network of typical ZSI are increased. This paper proposes a new switched trans ZSI(STZSI) with two switched trans cells which consist of one trans and two diodes. To confirm the operation performance of the proposed system, the PSIM simulation is performed for typical ZSI, switched inductor ZSI and the proposed STZSI. Voltage / current stress and transient state characteristics of each method are compared under the condition of DC input voltage 100[V] and output phase voltage 66[Vrms]. As a result, we confirmed that transient state of the proposed STZSI is short compared with the conventional ZSI because the high voltage gain is obtained using the same duty ratio, also a low duty ratio is required for the same output voltage. Finally, we could know the proposed system have low voltage and current stress in Z-network compared with the conventional ZSI.