• The Transactions of the Korean Institute of Electrical Engineers A
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• v.53 no.3
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• pp.161-167
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• 2004

Zone 3 of the distance relay is used to provide the remote back-up protection in case of the failure of the primary protection. However, the risk lot mal-operations under stressed conditions such as heavy loading, voltage and transient instability is usually high. Zone 3 is used in combination with the derivatives of the voltage, and current, etc to prevent mal-operations. Sometimes, the impedance characteristics that restrict the tripping area of relay are used to avoid the mal-operations due to load encroachment. This paper presents a novel Zone 3 scheme based on combining the steady-state components (i.e. 60Hz) and the transient components (TCs) using a state diagram that visualizes the sequence of studies that emanate from the sequence of events. The simulation results show that the novel zone 3 distance relay elements using the proposed method operates correctly for the various events.

• JSTS:Journal of Semiconductor Technology and Science
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• v.10 no.2
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• pp.79-99
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• 2010

Pulsed current-voltage (I-V) methods are introduced to evaluate the impact of fast transient charge trapping on the performance of high-k dielectric transistors. Several pulsed I-V measurement configurations and measurement requirements are critically reviewed. Properly configured pulsed I-V measurements are shown to be capable of extracting such device characteristics as trap-free mobility, trap-induced threshold voltage shift (${\Delta}V_t$), as well as effective fast transient trap density. The results demonstrate that the pulsed I-V measurements are an essential technique for evaluating high-$\kappa$ gate dielectric devices.

• Journal of Power Electronics
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• v.17 no.5
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• pp.1298-1307
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• 2017

The constant on-time current-mode controlled (COT-CMC) switching dc-dc converter is stable, with no subharmonic oscillation in its current loop when a voltage ripple in its outer voltage loop is ignored. However, when its output capacitance is small or its feedback gain is high, subharmonic oscillation may occur in a COT-CMC buck converter with a proportional-integral (PI) compensator. To investigate the subharmonic instability of COT-CMC buck converters with a PI compensator, an accurate reduced-order asynchronous-switching map model of a COT-CMC buck converter with a PI compensator is established. Based on this, the instability behaviors caused by output capacitance and feedback gain are investigated. Furthermore, an approximate instability condition is obtained and design-oriented stability boundaries in different circuit parameter spaces are yielded. The analysis results show that the instability of COT-CMC buck converters with a PI compensator is mainly affected by the output capacitance, output capacitor equivalent series resistance (ESR), feedback gain, current-sensing gain and constant on-time. The study results of this paper are helpful for the circuit parameter design of COT-CMC switching dc-dc converters. Experimental results are provided to verify the analysis results.

• The Proceedings of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.9 no.1
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• pp.37-46
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• 1995

Along with the recent trend of complexity and long distance transmission in power system, dynamic analysis of stability considering the load characteristics is an important subject. In this paper, the influence of the induction motor loads on the power system voltage is investigated. The influence of the inductive load ratio and the inertia of induction motor on the voltage response of the power system are examined, and in the case of the high percentage of the induction motor load, induction motors in the power system can lead to transient voltage instability even under the system condition such as switching operation. The application of static condenser(SC) to prevent the transient voltage instability is introduced.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.62 no.7
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• pp.943-949
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• 2013

Recently, an electric vehicle (EV) has been become a huge issue in the automotive industry. The EV has many electrical units: electric motors, batteries, converters, etc. The DC distribution power system (DPS) is essential for the EV. The DC DPS offers many advantages. However, multiple loads in the DC DPS may affect the severe instability on the DC bus voltage. Therefore, a voltage bus conditioner (VBC) may use the DC DPS. The VBC is used to mitigate the voltage transient on the bus. Thus, a suitable control technique should be selected for the VBC. In this research, Current controller with fixed switching frequency is designed and applied for the VBC. The DC DPS consist of both a resistor load and a boost converter load. The load variations cause the instability of the DC DPS. This instability is mitigated by the VBC. The simulation results by Matlab simulink and experimental results are presented for validating the proposed VBC and designed control technique.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.12 no.3
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• pp.132-138
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• 1998

The dynamic analysis of stability in industrial power system is an important subject. In this paper, the effect of voltage dips for short duration (short-circuit) in the utility system on generators, synchronous motors of the industrial plant and the measures to be adopted to reduce the undesired effects of voltage dips re investigated. In the case of utility three-phase short-circuits of longer duration, both the generators and synchronous motors in the plant may become unstable. In order to avoid instability through fault clearing in the second zone time a decoupling device is necessary. The instability of voltage can be avoided with a well suited setting time of disconnecting device and load trip.

• The Transactions of the Korean Institute of Electrical Engineers A
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• v.53 no.3
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• pp.175-181
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• 2004

The protection against transient instability and consequent out-of-step condition is a major concern for the utility industry. Unstable system may cause serious damage to system elements such as generators and transmission lines. Therefore, out-of-step detection is essential to operate a system safely. The detection of out-of-step is generally based upon the rate of movement of the apparent impedance. However such relay monitors only the apparent impedance which may not be sufficient to correctly detect all forms of out-of-step and cannot cope with out-of-step for a more complex type of instability such as very fast power swing. This paper presents the out-of-step detection algorithm using voltage frequency deviation. The digital filters based on discrete Fourier transforms (DFT) to calculate the frequency of a sinusoid voltage are used, and the generator angle is estimated using the deviation of the calculated frequency component of the voltage. The proposed out-of-step algorithm is based on the assessment of a transient stability using equal area criterion. The proposed out-of-step algorithm is verified and tested by using EMTP MODELS.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.23 no.7
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• pp.545-549
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• 2010

Low-frequency noise (1/f noise) has been measured in order to analyze the Vth instability of ZnO TFTs having two different active layer thicknesses of 40 nm and 80 nm. Under electrical stress, it was found that the TFTs with the active layer thickness of 80 nm shows smaller threshold voltage shift (${\Delta}V_{th}$) than those with thickness of 40 nm. However the ${\Delta}V_{th}$ is completely relaxed after the removal of DC stress. In order to investigate the cause of this threshold voltage instability, we accomplished the 1/f noise measurement and found that ZnO TFTs exposed the mobility fluctuation properties, in which the noise level increases as the gate bias rises and the normalized drain current noise level($S_{ID}/{I_D}^2$) of the active layer of thickness 80 nm is smaller than that of active layer thickness of thickness 40 nm. This result means that the 80 nm thickness TFTs have a smaller density of traps. This result correlated with the physical characteristics analysis performmed using XRD, which indicated that the grain size increases when the active layer thickness is made thicker. Consequently, the number of preexisting traps in the device increases with decreasing thickness of the active layer and are related closely to the $V_{th}$ instability under electrical stress.

• JSTS:Journal of Semiconductor Technology and Science
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• v.13 no.2
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• pp.87-97
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• 2013

Negative bias temperature instability (NBTI) and positive bias temperature instability (PBTI) are critical circuit reliability issues in highly scaled CMOS technologies. In this paper, we analyze the impacts of NBTI and PBTI on SRAM $V_{MIN}$, and present a design solution for mitigating the impact of NBTI and PBTI on SRAM $V_{MIN}$. Two different types of SRAM $V_{MIN}$ (SNM-limited $V_{MIN}$ and time-limited $V_{MIN}$) are explained. Simulation results show that SNM-limited $V_{MIN}$ is more sensitive to NBTI while time-limited $V_{MIN}$ is more prone to suffer from PBTI effect. The proposed NBTI/PBTI-aware control of wordline pulse width and woldline voltage improves cell stability, and mitigates the $V_{MIN}$ degradation induced by NBTI/PBTI.

• The Transactions of the Korean Institute of Power Electronics
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• v.15 no.1
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• pp.43-51
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• 2010

This paper proposes an analysis of voltage delay and compensation for current control in H-Bridge Multi-Level (HBML) inverters for a medium voltage motor drive with vector control. It is shown that the expansion and modularization capability of the HBML inverter is improved in case of using Phase-Shifted Pulse Width Modulation (PSPWM) since individual inverter modules operate more independently. But, the PSPWM of HBML has a phase difference between reference voltage and real voltage, which can cause instability in the current regulator at high speed where the ratio of the sampling frequency to the output frequency is insufficient. This instability of the current regulator is removed by adding a proposed method which compensate a phase difference between reference voltage and real voltage. The proposed method is suitable for HBML inverter controlled by PSPWM with low switching frequency and high speed motor drive. The validity of the proposed method is verified experimentally on 6,600[V] 1,400[kW] induction motor fed by an 13-level HBML inverter.