• The Journal of the Institute of Internet, Broadcasting and Communication
• /
• v.23 no.3
• /
• pp.13-18
• /
• 2023

As the number of mobile applications increases rapidly, the overhead of swapping in smartphone memory systems keeps increasing. Unlike desktop or server systems, the basic setting of smartphones does not support swapping, so applications are killed when available memory is exhausted. This is because swapping in smartphones incurs excessive storage I/O overhead. In this article, we propose a swapping policy for smartphones, which significantly reduces storage I/Os. The proposed policy categorizes mobile applications based on their functional characteristics, and controls the number of applications to be swapped based on application priorities and memory situations. Measurement experiments with Android reference devices show that the proposed swapping policy dramatically reduces the overhead of swapping in various mobile applications.

• KSII Transactions on Internet and Information Systems (TIIS)
• /
• v.11 no.1
• /
• pp.396-413
• /
• 2017

Dynamically checking the integrity of software at run-time is always a hot and difficult spot for trusted computing. Control-flow integrity is a basic and important safety property of software integrity. Many classic and emerging security attacks who introduce illegal control-flow to applications can cause unpredictable behaviors of computer-based systems. In this paper, we present a software-based approach to checking violation of control flow integrity at run-time. This paper proposes a high-performance and low-overhead software control flow checking solution, control flow checking at virtual edges (CFCVE). CFCVE assigns a unique signature to each basic block and then inserts a virtual vertex into each edge at compile time. This together with insertion of signature updating instructions and checking instructions into corresponding vertexes and virtual vertexes. Control flow faults can be detected by comparing the run-time signature with the saved one at compile time. Our experimental results show that CFCVE incurs only 10.61% performance overhead on average for several C benchmark programs and the average undetected error rate is only 9.29%. Compared with previous techniques, CFCVE has the characteristics of both high fault coverage and low memory and performance overhead.

• Transactions of the Korean Society of Automotive Engineers
• /
• v.18 no.4
• /
• pp.92-98
• /
• 2010

Virtual ground modeling is one of key topic for real-time vehicle dynamic simulation. This paper discusses about the virtual 3D road modeling process using parametric surface concept. General road data is a type of lumped position vector so interpolation process is required to compute contact of internal surface. The parametric surface has continuity and linearity within boundaries and functions are very simple to find out contact point. In this paper, the parametric surface formula is adopted to road modeling to calculate road hight. Position indexing method is proposed to reduce memory size and resource possession, and a simple mathematical method for contact patch searching is also proposed. The developed road process program is tested in dynamic driving simulation on off-road. Conclusively, the new virtual road program shows high performance of road hight computation in vast field of off-road simulation.

• Journal of Korea Multimedia Society
• /
• v.9 no.12
• /
• pp.1617-1627
• /
• 2006

The concept of middleware for digital TV receivers is not new one. Using middleware for digital TV development has a number of advantages. It makes it easier for manufacturers to hide differences in the underlying hardware. It also offers a standard platform for application developers. Digital TV middleware enables set-top boxes(STBs) to run video, audio, and applications. The main concern of digital TV middleware is now to reduce its memory usage because most STBs in the market are small footprint. In this paper, we propose several ideas about how to reduce the required memory size on the runtime area of DTV middleware using a new native process technology. Our proposed system has two components; the Efficient Native Process Module, and Enhanced Native Interface APIs for concurrent native modules. With our approach, the required memory reduced from 50% up to 75% compared with the traditional approach. It can be suitable for low end STBs of very low hardware limitation.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• 2003.10a
• /
• pp.548-551
• /
• 2003

JSize is a Java equivalent of the Unix size program. The Unix size program analyses an executable file and estimates the size of code and data segment when the file is loaded on memory. Likewise, JSize analyze a Java class file and estimates the size of class area when the file is loaded on memory. This paper presents the principles necessary to estimate the class area size with the information obtained from a class file. An experimental result is included to show the accuracy of estimation the JSize provides.

• KIEE International Transactions on Electrophysics and Applications
• /
• v.5C no.1
• /
• pp.14-17
• /
• 2005

In this paper, an automated methodology for generating model parameters considering real manufacturing processes is presented with verified results. In addition, the outcomes of applications to the next generation of flash memory devices using the parameters calibrated from the process specification decision are analyzed. The test vehicle is replaced with a well-calibrated TCAD simulation. First, the calibration methodology is introduced and tested for a flash memory device. The calibration errors are less than 5% of a full chip operation, which is acceptable to designers. The results of the calibration are then used to predict the I-V curves and the model parameters of various transistors for the design of flash devices.

• Proceedings of the Korean Information Science Society Conference
• /
• 2001.04a
• /
• pp.115-117
• /
• 2001

대부분의 embedded system에서 hard-disk 대용으로 flash memory를 사용하고 있으며, flash device에 압축 커널이미지와 root file system image를 가지고 있다. Booting 고정 중 커널의 압축이 풀리고 메모리에 로드되어 제어를 넘겨받으면 flash memory 상에 존재하는 root file system image를 ramdisk의 image로 로드하여 시스템은 결국 ramdisk에 root file system을 가지게 된다. Ramdisk 상의 프로그램을 실행하기 위해 메모리로 실행파일 이미지를 copy하는 과정을 피하고 ramdisk 상의 이미지를 바로 프로세스의 virtual memory area에 직접 매핑 시켜 주는 XIP(eXection-In-Place)를 구현함으로써 많은 메모리 절감 효과를 얻을 수 있다. 본 연구에서는 ramdisk를 root file system으로 사용하는 embedded system에서의 XIP 구조를 설계하고 구현하였다.

• Proceedings of the Korean Society for Cognitive Science Conference
• /
• 2010.05a
• /
• pp.37-41
• /
• 2010

The previous investigations of electroencephalogram (EEG) activity in the memory retrieval tasks demonstrated that event-related potentials (ERP) during recollection showed different durations and the peak levels from those without recollection. However, it has been unknown that recollection in memory retrieval also modulates high-frequency brain rhythms as well as establishes large-scale synchronization across different cortical areas. In this study, we examined the spectral components of the EEG signals, especially the gamma bands (20-80Hz), measured during the memory retrieval tasks. Specifically, we focused on two major spectral components: first, we evaluated the temporal patterns of the power spectral density before and after the onset of the memory retrieval task; second, we estimated phase synchrony between all possible pairs of EEG channels to evaluate large-scale synchronization. Fourteen healthy subjects performed the memory retrieval task in the virtual reality environment where they selected whether or not t he present item was seen in the previous training period. When the subjects viewed the unseen items, the middle gamma power (40-60Hz) appeared to increase 200-500ms after stimulus onset while the low gamma power (20Hz) was suppressed all the way through the post-stimulus period 150ms after onset. The degree of phase synchronization in this low gamma level, however, increased when the subjects fetched the item from memory. This suggests that phase synchrony analysis might reveal different aspects of the memory retrieval process than the gamma power, providing additional information to the inference on the brain dynamics during memory retrieval.

• 제어로봇시스템학회:학술대회논문집
• /
• 1997.10a
• /
• pp.744-747
• /
• 1997

High performance digital computer technology enables the digital computer-based controllers to replace traditional analog controllers used for factory automations. This replacement, however, brings up the side effects caused by discrete quantization and non-real-time execution of control softwares. This paper describes the structure of real-time simulator and controller that can be used for design and verification of real-time digital controllers. The virtual machine concept adopted by real-time simulator make the proposed simulator be independent from the specific hardware platforms. The proposed system can also be used in the loosely coupled distributed environments connected through local area network using real-time message passing algorithm and virtual data table based on the shared memory mechanism.

• IE interfaces
• /
• v.23 no.3
• /
• pp.229-238
• /
• 2010

Virtual metrology (VM), a critical component of semiconductor manufacturing, is an efficient way of assessing the quality of wafers not actually measured. This is done based on a model between equipment sensor data (obtained for all wafers) and the quality characteristics of wafers actually measured. This paper considers principal component regression (PCR), partial least squares regression (PLSR), kernel PCR (KPCR), and kernel PLSR (KPLSR) as VM models. For each regression model, two cases are considered. One utilizes all explanatory variables in developing a model, and the other selects significant variables using the genetic algorithm (GA). The prediction performances of 8 regression models are compared for the short- and long-term etch process data. It is found among others that the GA-KPLSR model performs best for both types of data. Especially, its prediction ability is within the requirement for the short-term data implying that it can be used to implement VM for real etch processes.