• Title/Summary/Keyword: Very-high radix

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Implementation Schemes to Optimize Very-High Radix Dividers in Pre-processing Scaling Factor Design (높은 자릿수를 이용한 고속 나눗셈 연산기의 최적화 연구 및 변환 요소 전처리를 위한 설계)

  • 이병석;안성용;홍승완;이정아
    • Proceedings of the Korean Information Science Society Conference
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    • 1998.10a
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    • pp.44-47
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    • 1998
  • 나눗셈 알고리즘은 다른 덧셈이나 곱셈 알고리즘과 비교하여 복잡하고, 수행빈도수 적다는 이류로 그 동안 고속 나눗셈의 하드웨어 연구는 활발하지 않았다. 그러나 멀티미디어의 발전으로 고속 나눗셈의 필요성 및 전체적인 수행 시간 향상을 위해 고속 나눗셈 연산기의 중요성은 더욱 부각되고 있다. 그러나 칩의 크기는 제작 단가와 깊은 관련이 있기 때문에 고속 나눗셈 연산기를 칩으로 제작할 때 요구되는 성능과 비용을 만족하기 위한 적절한 분석이 필요하다. 본 논문은 자릿수 순환(Digt Recurrence) 알고리즘에서 속도가 빠른 높은 자릿수 이용(Very-High Radix) 알고리즘을 기반으로 최적화된 자릿수 (Radix) 범위를 제시하였다. 그리고 변환요소 (Scaling Factor)를 전처리(Pre-processing)하여 연산의 주기를 감소하고, 크기의 문제를 해결하기 위해서 상수표 대신 제어(Control)방법으로 값을 구하는 방법을 설계하였다.

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Efficient FFT Algorithm and Hardware Implementation for High Speed Multimedia Communication Systems (고속 멀티미디어 통신시스템을 위한 효율적인 FFT 알고리즘 및 하드웨어 구현)

  • 정윤호;김재석
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.41 no.3
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    • pp.55-64
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    • 2004
  • In this paper, we propose an efficient FFT algorithm for high speed multimedia communication systems, and present its pipeline implementation results. Since the proposed algorithm is based on the radix-4 butterfly unit, the processing rate can be twice as fast as that based on the radix-2$^3$ algorithm. Also, its implementation is more area-efficient than the implementation from conventional radix-4 algorithm due to reduced number of nontrivial multipliers like using the radix-23 algorithm. In order to compare the proposed algorithm with the conventional radix-4 algorithm, the 64-point MDC pipelined FFT processor based on the proposed algorithm was implemented. After the logic synthesis using 0.6${\mu}{\textrm}{m}$ technology, the logic gate count for the processor with the proposed algorithm is only about 70% of that for the processor with the conventional radix-4 algorithm. Since the proposed algorithm can be achieve higher processing rate and better efficiency than the conventional algorithm, it is very suitable for the high speed multimedia communication systems such as WLAN, DAB, DVB, and ADSL/VDSL systems.

An Efficient ACS Architecture for radix-4 Viterbi Decoder (Radix-4 비터비 디코더를 위한 효율적인 ACS 구조)

  • Kim Deok-Hwan;Rim Chong-Suck
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.42 no.1
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    • pp.69-77
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    • 2005
  • The Viterbi decoder which is used for the forward error correction(FEC) is a crucial component for successful modern communication systems. As modern communication speed rapidly high, the development of high speed communication module is important. However, since the feedback loop in ACS operation, high speed of Viterbi decoder is very difficult. In this paper, we propose an area reduced, high speed ACS Architecture of Viterbi decoder based on the radix-4 architecture. The area is reduced by rearranging the ACS operations, and the speed is improved by retiming of path metric memory. The proposed ACS architecture of Viterbi decoder is implemented in VHDL and synthesized in Xilinx ISE 6.2i. The area-time product of the proposed architecture is improved by 11% compared to that of the previous high speed radix-4 ACS architecture.

Design and implementation of pre-scaling look-up table for very-high radix divider (고속나눗셈 연산기를 위한 영역변환상수 검색테이블의 설계 및 구현)

  • Lee, Byeong-Seok;Lee, Jeong-A
    • Journal of IKEEE
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    • v.3 no.2 s.5
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    • pp.276-284
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    • 1999
  • In this paper, we propose a new technique which allows to store the pre-scaling constants directly in a table thus eliminating the cycle for computing pre-scaling constants. Especially we analyzed the range of pre-scalingconstants and rearranged them in a carry-save form using two look-up tables so that the size of the tables can be reduced significantly. The resulting scheme is compared with the previously developed method and shown to be effective with respect to area and time to implement the high-radix divider.

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A Study on the Anti-Condensing Effect of ChondroT Components (ChondroT 구성 약재의 항응고 효과에 관한 연구)

  • Kim, Sun-Gil;Jeong, Ji-Won;Lim, Young-Ha;Kim, Ji-Hoon;Na, Chang-Su;Kim, Seon-Jong
    • Journal of Korean Medicine Rehabilitation
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    • v.28 no.2
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    • pp.47-60
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    • 2018
  • Objectives The objective of this study was to investigate the effect of Anti-condensing on the composition of ChondroT Methods Specimens are divided in 7 groups (Control, ChondroT, Lonicerae Folium (Gumenhwa, GEH), Angelicae Gigantis Radix(Danggui, DG), Phellodendri Cortex(HwangBaek, HB), Osterici Radix(Kanghwal, KH), Clematidis Radix(Weeryungsun, WRS)) Each specimen is subjected to a concentration of 20 %, 10 %, and 5 %, and is administered to collagen and thrombin-stimulated platelets. Results In the anticoagulance effect test, Lonicerae Folium and ChondroT very well. The effect was high in order of Lonicerae Folium-Angelicae Gigantis-Phellodendri Cortex-Osterici Radix and Clematidis Radix. Conclusions ChondroT has anti-condensing effects on blood platelet.

Design and Implementation of Lok-up Table for Pre-scaling in Very-High Radix Divider (높은 자릿수 나눗셈 연산기에서의 영역변환상수를 위한 검색테이블 설계 및 구현)

  • 이병석;송문식;이정아
    • Proceedings of the Korean Information Science Society Conference
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    • 1999.10c
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    • pp.3-5
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    • 1999
  • 나눗셈 알고리즘은 다른 덧셈이나 곱셈 알고리즘에 비해 복잡하고, 수행 빈도수가 적다는 이유로 그동안 고속 나눗셈의 하드웨어 연구는 활발하지 않았다. 그러나 멀티미디어의 발전 및 고성능의 그래픽 랜더링을 위한 보다 빠른 부동소수점연산기(FPU)가 필요하게 되었으며, 이에 따라서 고속의 나눗셈 연산기의 필요성이 증가하게 되었다. 특히, 전체의 수행 시간 향상을 위해서라도 고속 나눗셈 연산기의 중용성은 더욱 부각되고 있다. 그러나 고속 나눗셈 연산기는 연산 속도와 크기라는 서로 상반되는 요소를 가지고 있다. 즉, 연산 속도가 빠르면 크기는 늘어나고, 크기를 줄이면 연산 속도는 늦어지게 된다. 본 논문은 높은 자릿수(Very-High Radix) 나눗셈 알고리즘에서 영역변환상수를 구하는 방법으로 연산이 아닌 검색테이블(Look-up Table)을 이용한다. 그리고 검색테이블의 크기를 줄이는 방법으로 영역변환상수의 범위 분석 및 캐리 저장형을 이용한 검색테이블 분할 방법을 이용하였다. 전체적으로는 영역변환상수를 구하는 연산주기가 필요없게 되므로 나눗셈 연산기의 영역 크기의 변화가 적으면서 연산 속도는 빨라졌음을 알 수 있다.

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2048-point Low-Complexity Pipelined FFT Processor based on Dynamic Scaling (동적 스케일링에 기반한 낮은 복잡도의 2048 포인트 파이프라인 FFT 프로세서)

  • Kim, Ji-Hoon
    • Journal of IKEEE
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    • v.25 no.4
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    • pp.697-702
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    • 2021
  • Fast Fourier Transform (FFT) is a major signal processing block being widely used. For long-point FFT processing, usually more than 1024 points, its low-complexity implementation becomes very important while retaining high SQNR (Signal-to-Quantization Noise Ratio). In this paper, we present a low-complexity FFT algorithm with a simple dynamic scaling scheme. For the 2048-point pipelined FFT processing, we can reduce the number of general multipliers by half compared to the well-known radix-2 algorithm. Also, the table size for twiddle factors is reduced to 35% and 53% compared to the radix-2 and radix-22 algorithms respectively, while achieving SQNR of more than 55dB without increasing the internal wordlength progressively.

Memory Reduction Method of Radix-22 MDF IFFT for OFDM Communication Systems (OFDM 통신시스템을 위한 radix-22 MDF IFFT의 메모리 감소 기법)

  • Cho, Kyung-Ju
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.13 no.1
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    • pp.42-47
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    • 2020
  • In OFDM-based very high-speed communication systems, FFT/IFFT processor should have several properties of low-area and low-power consumption as well as high throughput and low processing latency. Thus, radix-2k MDF (multipath delay feedback) architectures by adopting pipeline and parallel processing are suitable. In MDF architecture, the feedback memory which increases in proportion to the input signal word-length has a large area and power consumption. This paper presents a feedback memory size reduction method of radix-22 MDF IFFT processor for OFDM applications. The proposed method focuses on reducing the feedback memory size in the first two stages of MDF architectures since the first two stages occupy about 75% of the total feedback memory. In OFDM transmissions, IFFT input signals are composed of modulated data and pilot, null signals. In order to reduce the IFFT input word-length, the integer mapping which generates mapped data composed of two signed integer corresponding to modulated data and pilot/null signals is proposed. By simulation, it is shown that the proposed method has achieved a feedback memory reduction up to 39% compared to conventional approach.

A VLSI array implementation of vector-radix 2-D fast DCT (Vector-radix 2차원 고속 DCT의 VLSI 어레이 구현)

  • 강용섬;전흥우;신경욱
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.32A no.1
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    • pp.234-243
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    • 1995
  • An arry circuit is designed for parallel computation of vector-radix 2-D discrete cosine transform (VR-FCT) which is a fast algorithm of DCT. By using a 2-D array of processing elements (PEs), the butterfly structure of the VR-FCT can be efficiently implemented with high condurrency and local communication geometry. The proposed implementation features architectural medularity, regularity and locality, so that it is very suitable for VLSI realization. Also, no transposition memory is required. The array core for (8$\times$8) 2-D DCT, which is designed usign ISRC 1.5.mu.m N-Well CMOS technology, consists of 64 PEs arranged in (8$\times$8) 2-D array and contains about 98,000 transistors on an area of 138mm$^{2}$. From simulation results, it is estimated that (8$\times$8) 2-D DCT can be computed in about 0.88 .mu.sec at 50 MHz clock frequency, resulting in the throughput rate of about 72${\times}10^[6}$ pixels per second.

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The Effects of Aconiti Radix on Thyroid Function in Hypothyroidism Rat Model Induced by 6-propyl-2-thiouracil(PTU). (부자(附子)가 6-propyl-2-thiouracil(PTU)로 유발된 rat의 갑상선 기능저하증에 미치는 영향)

  • Lee, Sang-Hun;Lee, Byung-Cheol;Ahn, Young-Min;Doo, Ho-Kyung;Ahn, Se-Young
    • The Journal of Internal Korean Medicine
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    • v.28 no.2
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    • pp.275-283
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    • 2007
  • Objective : Although hypothyroidism is a common disease in the endocrinology system, it is reported that there are a lot of difficulties in treating it effectively. Aconiti Ra얕 traditionally has been used in treatment of coldness, fatigue, and bradycardia. In this study, we investigated the therapeutic effects of Aconiti Radix on hypothyroidism rat model induced by 6-propyl-2-thiouracil (PTU). Methods : Two-month-old rats were used with administration of PTU which induced hypothyroidism in the rats. After 2 weeks, Aconiti Radix and thyroxine were administered, respectively. The body weights were measured every week. After 4 weeks, the blood samples of all rats were taken from their hearts. They were analyzed biochemically and $T_4$ (thyroid hormone) & TSH (thyroid stimulating hormone) was measured by ELISA kits. Results : In comparison with normals, controls showed hypothyroidism with significantly low $T_4$ and high TSH the statistics. In Aconiti Radix administration groups significantly increased $T_4$ was observed in the statistics and its effects were dose-dependent. There was no difference statistically in TSH of Aconiti Radix treatment groups from controls, nor were statistical differences observed significantly in biochemical labs and weight of each group. Conclusions : These findings suggest that Aconiti Radix protects thyroid cells and makes thyroid cells produce thyroid hormones. It is also very safe in the view of liver, kidney function, and other metabolism. It may be a useful agent for treating hypothyroidism.

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