• 한국건축시공학회:학술대회논문집
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• 한국건축시공학회 2019년도 춘계 학술논문 발표대회
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• pp.51-52
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• 2019

Currently in domestic, it is difficult to the evacuation in fire due to the building is higher. Therefore it is necessary to evacuation safety design of building. To conduct the evacuation fire design of building, it should be done the Evacuation Safety Verification. But it is not sufficient the Study about Evacuation Safety Verification in currently domestic. Therefore in this study, we conducted the evacuation safety verification using people who they can't the evacuation themselves. The method of verification, we suggest the comparative that people who they can't the evacuation themselves and available safety evacuation time. Available safety evacuation time is determined by determined method from disaster statistics of casualties or equivalence with current standard requirement. it is doing to objectively judge of evacuation safety design validity in building.

• Structural Engineering and Mechanics
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• 제71권6호
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• pp.643-656
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• 2019

A new seismic design methodology was proposed for precast concrete diaphragms. This methodology adopts seismic design factors applied on top of current diaphragm design forces. These factors are aimed to produce diaphragm design strengths aligned with different seismic performance targets. These factors were established through extensive parametric studies. These studies used a simple evaluation structure with a single-bay rectangular diaphragm. The simple evaluation structure is suitable for establishment of the design factors over comprehensive structural geometry and design parameters. However, the application of the design factors to prototype structures with realistic layouts requires further verification and investigation. This paper presents diaphragm design of several precast concrete parking structures using the new design methodology and verification of the design factor through nonlinear dynamic time history analyses. The seismic behavior and performance of the diaphragm were investigated for the precast concrete parking structures. It was found that the design factor established for the new design methodology is applicable to the realistic precast concrete parking structures.

• 대한기계학회논문집A
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• 제30권7호
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• pp.816-825
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• 2006

This paper describes the development of a web-based interference verification system in the mold design process. Although several commercial CAD systems furnish interference verification functions, those systems are very expensive and inadequate to perform collaborative works over the Internet. In this paper, an efficient and precision hybrid interference verification algorithm for the web-based interference verification system over the distributed environment has been studied. The proposed system uses lightweight CAD files produced from the optimally transformed CAD data through ACIS kernel and InterOp. Collaborators related to the development of a new product are able to verify the interference verification over the Internet without commercial CAD systems. The system reduces production cost, errors and lead-time to the market. Validity of the developed system is confirmed through case studies.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 1998년도 추계종합학술대회 논문집
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• pp.755-758
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• 1998

As the performance of microprocessor improves, the design complexity grows exponentially. Therefor, it is very important to make the bug-free model as early as possible in a design life-cycle. This paper describes the simulation-based functional verification methodology for the RTL level description model. It is performed by multi-stage verification methods using extensive hand-generated self-checking tests supplemented with random tests. This approach is opplied to the functional verification of the GPU processor of Raptor and various bugs are detected.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2003년도 컴퓨터소사이어티 추계학술대회논문집
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• pp.167-170
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• 2003

In this paper, a design and experiment of PCI Express Core verification Model is described. The model targeting Endpoint core verification is designed by using newly-emerging SystemC which is a system design language based on a new C++ class library and simulation engine. In the verification model, we developed a SystemC Host System model which act as a Root Complex and Device Driver dedicated to the PCI Express Endpoint RTL Core. The test of Host System Model is guided by scenarios which implements and acts point of Device Driver and Root Complex and shows the result of simulation. Also, We present the full structure of verification model and Host model.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2004년도 ICEIC The International Conference on Electronics Informations and Communications
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• pp.285-288
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• 2004

In this paper, we present a design and experiment of PCI Express core verification model. The model targeting Endpoint core based on Verilog HDL is designed by newly-emerging SystemC, which is a new C++ class library based system design approach. In the verification model, we designed and implemented a SystemC host system model which acted as Root Complex and device driver dedicated to the PCI Express Endpoint RTL core. The verification process is scheduled by scenarios which are implemented in host model. We show that the model is useful especially for verifying the RTL model which has dependencies on system software.

• 한국정보과학회논문지:컴퓨팅의 실제 및 레터
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• 제6권4호
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• pp.448-456
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• 2000

설계되는 시스템의 규모가 커지고 복잡해지므로 이를 빠른 시간 내에 효율적으로 검증하기 위한 상위 단계에서의 검증 기술의 개발이 중요하게 되었다. 본 연구에서는 하드웨어와 소프트웨어가 혼합되어 있는 시스템을 위한 상위 단계에서의 검증기술을 개발하였다. 에뮬레이션 또는 시뮬레이션만을 수행하는 것보다 빠르고 우수하게 기능적으로 검증하기 위해, 하드웨어와 소프트웨어 부분으로 분할한 후 인터페이스 회로를 이용하여 구현 가능하도록 하였다. 그리고, 상위 단계의 회로를 쉽게 하드웨어를 이용하여 검증하기 위한 설계 지침들을 제시하였다. 본 방법을 이용하여 리드-솔로몬 디코더 회로에 대한 검증을 수행한 결과 시뮬레이션만을 수행한 경우에 비하여 modified Euclid 알고리즘 수행 블록은 12,000배 이상의 속도로 검증을 수행할 수 있었으며, 전체 검증 시간도 반 이하로 줄었다.

• 음성과학
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• 제10권2호
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• pp.35-43
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• 2003

General speaker verification systems improve their recognition performances by normalizing log likelihood ratio, using a speaker model and its background speaker model that are required to be verified. So these systems rely heavily on the availability of much speaker independent databases for background speaker model design. This constraint, however, may be a burden in practical and portable devices such as palm-top computers or wireless handsets which place a premium on computations and memory. In this paper, new approach for the GMM-based background model design used in portable speaker verification system is presented when the enrollment data is available. This approach is to modify three parameters of GMM speaker model such as mixture weights, means and covariances along with reduced mixture order. According to the experiment on a 20 speaker population from YOHO database, we found that this method had a promise of effective use in a portable speaker verification system.

• 융합신호처리학회논문지
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• 제10권4호
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• pp.274-279
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• 2009

시스템수준 설계방법론에서 널리 사용하고 있는 설계흐름도는 시스템명세, 시스템수준의 HW/SW 분할, HW/SW 통합설계, 가상 또는 물리적 프로토타입을 이용한 통합검증, 시스템통합으로 구성된다. 본 논문에서는 SystemVerilog와 SystemC를 기반으로 하여 신속한 기능검증이 가능한 native-code 통합검증환경과 클럭수준 검증까지 가능한 계층화 통합검증환경을 각각 구현하였다. Native-code 통합검증환경은 시스템수준 설계언어인 SystemC를 이용하여 HW/SW 분할단계를 수행한 후, SoC 설계의 HW부분과 SW부분을 각각 SystemVerilog와 SystemC로 모델링하여 상호작용을 하나의 시뮬레이션 프로세스로 검증한다. 계층화된 SystemVerilog 테스트벤치는 임의의 테스트벡터를 생성하여 DUT의 모서리 시험을 포함하는 검증환경으로 본 논문에서는 SystemC를 도입하여 다중 상속을 가지는 통합검증환경의 구성요소를 먼저 설계한 후, SystemVerilog DPI와 ModelSim 매크로를 이용하여 SystemVerilog 테스트벤치와 결합된 통합검증환경을 설계한다. 다중 상속은 여러 기초클래스를 결합한 새로운 클래스를 정의하여 코드의 재사용성을 높이는 장점을 가지므로, 본 논문의 SystemC를 도입한 통합검증환경 설계는 검증된 기존의 코드를 재사용할 수 있는 이점을 가진다.

• 한국산학기술학회논문지
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• 제13권9호
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• pp.4207-4213
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• 2012

소프트웨어의 품질은 요구사항 품질과 강하게 관계되어 있다. 이에 따라서 기업들은 요구사항의 품질을 향상시켜 주기 위한 노력을 하고 있다. 그러나 명세서 형태의 요구사항은 검증하기 어려우며, 분석가의 비정형화된 업무 지식에 의존해야 한다. 또한 명세서 형태의 요구사항 품질을 향상시켜 주기 위한 정형화된 방법론이나 자동화된 기법이 미흡한 상황이다. 본 논문에서는 요구사항의 품질을 향상시켜 주기 위한 요구사항 검증 프로세스 및 자동화 검증 도구를 제안한다. 검증을 위해 요구사항에 대한 외적뷰 설계와 내적뷰 설계를 비교한다. 사례연구를 통해 제안된 요구사항 자동화 검증 기법의 타당성을 검증한다.