• 한국산학기술학회논문지
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• 제12권1호
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• pp.255-262
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• 2011

정보통신분야의 발전은 해킹 등의 역기능을 발생에 따라 정보보호를 위한 암호모듈의 한 수요가 급증한다. 국내 암호모듈 평가 기준의 불명확성과 모듈 선정의 어려움은 모듈 및 제품 상호간의 운용 및 호환성 확보를 어렵게 한다. 본 연구는 국외 암호모듈 평가 프로그램인 CMVP(Cryptographic Module Verification Program)를 분석하여 국내 암호모듈 암호 모듈 검증 기준 및 평가 절차, 검증 정책 발전 방향을 제안한다. 본 연구는 국내 암호모듈 발전정책을 제안하여 암호모듈 국제 표준화, 국제 암호모듈 제도에 대한 공조를 기반을 제공한다.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2003년도 하계종합학술대회 논문집 V
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• pp.2609-2612
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• 2003

This paper describes a 64 channel signal generator/analyzer module that is useful for verification and testing of digital circuits. It can perform logic analyzer function and signal generator function at the same time. The 64 Channel module is implemented with single FPGA chip for miniaturization, and an USB interface is used to increase portability of the module. Multiple modules can be used in parallel for the verification of large scale circuits. Moreover, since the module is implemented as a PC based system, one can configure convenient GUI(Graphic User Interface) environment.

• 반도체디스플레이기술학회지
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• 제23권1호
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• pp.25-35
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• 2024

In the present modern day, as the complexity and size of SoC(System on Chip) increase, the importance of design verification are increasing, Therefore it takes a lot of time to verify the design. There is an emerging need to manage the verification environment faster and more efficiently by reusing the existing verification environment. UVM-based verification is a standardized and highly reliable verification method widely adopted and used in the semiconductor industry. This paper presents a UVM-based verification for the 4 tap equalizer module with a systolic array structure. Through the constraints randomization, it was confirmed that various test scenarios stimulus were generated. In addition, by verifying a simulation comparing the actual DUT outputs with the MATLAB reference outputs, the reuse and efficiency of the UVM test bench could be confirmed.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2004년도 추계학술대회 논문집 전력기술부문
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• pp.21-23
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• 2004

The purpose of this paper is to explain the techniques of the data verification module achieved while developing a transient stability program which is suitable to korean power system. It concentrates on the concrete explanation about modeling of the dynamic models and the method of the data verification. This proposed module enhances the performance of the developing program. This developing module has been tested with the KEPCO system, and the simulation results obtained from the program are compared to those of commercial programs.

• 한국정밀공학회지
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• 제13권4호
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• pp.43-52
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• 1996

This paper describes interactive computer procedures for design the forming sequences in cold forging. This system is implemented on the personal computer and its environment is a commercial AutoCAD system. The programming language. AutoLISP, was used for the configuration of the system. Since the process of metal forming can be considered as a transformation of geometry, treatment of the geometry of the part is a key in process planning. To recognize the part section geometry, the section entity representation, the section coordinate-redius representation and the section primitive geometru were adopted. This system includes six major modules such as input module, forging design module, forming sequence design module, die design module, FEM verification module and output module which are used independently or in all. The sequence drawing wigh all dimensions, which includes the dimensional tolerances and the proper sequence of operations, can generate under the environment of AutoCAD. The acceptable forming sequences can be verified further, using the FE simulation.

• 센서학회지
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• 제22권1호
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• pp.65-70
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• 2013

The integrated sensor module of vehicle combines the functions of rain sensor, auto defog sensor, and sun angle sensor into a single module. These functions originally were applied to work separatively. This integrated sensor module should meet the each performance which appears from the individual modules up to the same level or higher. Therefore, it is important to verify the stability and the accuracy considering the characteristics of the integrated sensor module according to various situations. For the verification, we need to use the actual data of integrated sensor module measured but, a lot of time and money is needed to collect data measured under various circumstances when operating. Thus, through the development of this simulator for the control of the integrated sensor module, we can use it effectively for the initial verification of integrated sensor module by implementing the various situations. In this paper, the simulator for controlling the integrated sensor module which combines vision-based rain sensor, auto defog sensor, auto light sensor, and sun angle sensor has been developed.

• 한국통신학회논문지
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• 제21권2호
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• pp.409-416
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• 1996

This paper describes the simulation environment that verifies whether a new microporcessor described with HDL is compatible with an existing microprocessor. The compatibility verification is done by showing that the new microprocessor executes the OS(Operating System) program used in the existing microprocessor without any modification of its binary code. The proposed verification environment consists of a virtual system and a graphic user interface (GUI) module. Each module is independently designed based on serve-client model and three exists a communication part for information interchange between the two modules. This paper describes the method of constructing the verification environment and presents the compatibility verification environment of the x86 microprocessor as the simulation result.

• 전자공학회논문지A
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• 제32A권7호
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• pp.115-122
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• 1995

This paper presents the simulation environment that verifies whether a new microprocessor described with HDL is compatible with MS-DOS. The phrase 'compatible with MS-DOS' means that the microprocessor can execute MS-DOS without any modification of MS-DOS's binary code. The proposed verification environment consists of HDL simulator and user interface module. And the communications between them are performed by using sockets which UNIXprovide. The HDL simulator is equipped with several functions, which use PLI to emulate ROM-BIOS facilities. The ROM-BIOS emulation routine is described by using these functions. User interface module utilizes S/MOTIF and participates in emulating PC monitor and keyboard. The verification environment is tested by executing the MS-DOS commands (DIR, FORMAT, DATE, TIME etc.) with the HDL model of microprocessor, and the display of user interface module verifies that the environment works correctly. In this paper, the method of constructing the verification environment is presented, and the simulation results are summarized.

• Nuclear Engineering and Technology
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• 제56권4호
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• pp.1330-1338
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• 2024

Information on isotopic composition and geometric structure is necessary for identifying a true warhead. Nevertheless, such classified information should be protected physically or electronically. With a novel Hash encryption algorithm, this paper presents a Monte Carlo-based design of a neutron activation analysis verification module. The verification module employs a thermal neutron source, a non-uniform mask (physically encrypting information about isotopic composition and geometric structure), a gamma detector array, and a Hash encryption algorithm (for electronic encryption). In the physical field, a non-uniform mask is designed to distort the characteristic gamma rays emitted by the inspected item. Furthermore, as part of the Hash algorithm, a key is introduced to encrypt the data and improve the system resolution through electronic design. In order to quantify the difference between items, Hamming distance is used, which allows data encryption and analysis simultaneously. Simulated inspections of simple objects are used to quantify system performance. It is demonstrated that the method retains superior resolution even with 1% noise level. And the performances of anti-statistical attack and anti-brute force cracking are evaluated and found to be very excellent. The verification method lays a solid foundation for nuclear disarmament verification in the upcoming era.

• 전자공학회논문지
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• 제53권11호
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• pp.130-138
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• 2016

본 논문은 무기체계의 오류를 검증할 때 필요한 실시간 시스템 병렬시험 기법에 대해서 제안한다. 이전에 국방분야에서 사용되는 야전시험장비는 무기체계를 순차적으로 검증하는 방식을 사용하였다. 오류를 순차적으로 검증하는 방식은 내부유닛간의 상호 간섭에 의한 부분의 오류검증은 할 수 없었다. 이러한 이유로 인해 본 논문에는 기존에 무기체계 오류 검증 시 사용되는 순차적 시험기법이 아닌 임베디드 장치를 이용한 실시간 시스템 병렬시험 기법을 제안한다. 임베디드 모듈이 탑재된 스위칭 제어카드는 병렬시험을 수행하고 그 결과를 사용자의 제어장치로 전달한다. 이러한 방식은 기존의 방식에 비해 좀 더 정확하게 무기체계 내부의 상호 간섭에 대한 오류 검증을 할 수 있다.