• Title/Summary/Keyword: Varactor 다이오드

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Miniaturized Hairpin Tunable Filter with the Single Control Voltage (단일 제어 전원을 갖는 소형화된 헤어핀 튠어블 필터)

  • Myoung, Seong-Sik;Hong, Young-Pyo;Jang, Byung-Jun;Lee, Yong-Shik;Yook, Jong-Gwan
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.18 no.10
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    • pp.1126-1135
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    • 2007
  • This paper presents the varactor-tuned miniaturized hairpin tunable filter with a single control voltage. The previously proposed miniaturization method is a very straight-forward method to miniaturize a parallel coupled-line filter. In this paper, the miniaturized hairpin tunable filter is proposed with the constant ratio rule of that the capacitances of the each stage always have constant ratio without any dependency to miniaturized electrical length. To show the validity of the proposed method, a 3rd order 0.5 dB ripple Chebyshev fitter with a center frequency of 900 MHz and a fractional bandwidth(FBW) of 10 % was designed and fabricated. The fabricated filter was based on CER-10 substrate of Taconic Inc. with 1SV277 varactor diode of Toshiba Inc. The center frequency of the fabricated filter can be changed from 606 MHz to 944 MHz, 338 MHz with the control voltage from 0.5 V to 4 V. The insertion loss of the proposed filter is increased with the increment of the control voltage, and the filter characteristics are well reserved expect of slight change of the bandwidth with the various control voltage.

A Design and Construction of Phase-locked Dielectric Resonator Oscillator for VSAT (VSAT용 위상고정 유전체 공진 발진기의 설계 및 구현)

  • 류근관;이두한;홍의석
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.19 no.10
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    • pp.1973-1981
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    • 1994
  • A PLDRO(Phase Locked Dielectric Resonator Oscillator) in Ku-band(10.95-11.70GHz) is designed with the concept of the feedback property of PLL(Phase Locked Loop). A series feedback type DRO is developed, and VCDRO(Voltage Controlled Dielectric Resonator Oscillator) using a varactor diode as a voltage-variable capacitor is implemented to tune oscillating frequency electrically. Then, PLDRO is designed by using a SPD(Sampling Phase Detector). This PLDRO is phase-locked voltage controlled DRO to reference source(VHF band) by SPD at 10.00 GHz for European FSS(Fixed Satellite Service). The PLDRO generates output power greater than 10dBm at 10.00 GHz and has phase noise of -80 dBc/Hz at 10 KHz offset from carrier. This PLDRO achieves much better frequency stability than conventional VCDRO.

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Design of resistive mixer for 5.8GHz Wireless LAN (5.8GHz 무선 LAN용 저항성 혼합기 설계)

  • Yoo, Jae-Moon;Kang, Jeong-Jin;An, Jeong-Sig;Kim, Han-Suk;Lee, Jong-Arc
    • Journal of IKEEE
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    • v.3 no.1 s.4
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    • pp.79-85
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    • 1999
  • In this paper, the resistive mixer for 5.86Hz wireless LAN, main part receiving system, was designed and implemented. The noise characteristics and the linearity in the base band was superior. For the use of local oscillator of mixer, dielectric resonator of stable output and temperature characteristics was designed. For the electrical tuning by the capacitance variation of varactor diode, the microstrip line and magnetic coupling characteristics of the dielectric resonance was used. It was obtained that gain of the proposed resistive mixer containing the RF cable loss, is -13.8dB, the conversion loss of frequency converter is -12 dB, and the output power of local oscillator is 1.67 dBm.

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A Study on the Improvement of Performance in VCO Using In/Out Common Frequency Tuning (입출력 공동 주파수 동조를 통한 VCO의 성능 개선에 관한 연구)

  • Suh, Kyoung-Whoan;Jang, Jeong-Seok
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.21 no.5
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    • pp.468-474
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    • 2010
  • In this paper, a VCHO(Voltage Controlled Harmonic Oscillator) for K-band application has been designed and implemented. The proposed oscillator has a structure of two hair-pin resonators placed on input and output of active device. Using in/out common frequency tuning structure, the VCHO yields some advantages of the enhanced fundamental frequency suppression characteristic as well as the improved output power of second harmonic. According to implementation and measurement results, it was shown that a VCHO provides an output power of -2.41 dBm, a fundamental frequency suppression of -21.84 dBc, and phase noise of -101.44 dBc/Hz at 100 kHz offset. In addition, as for the bias voltage from 0 V to -10 V for the varactor diode, output frequency range of 10.58 MHz is obtained with a power variation of ${\pm}0.19\;dB$ over its frequency range.

Implementation of RF Oscillator Using Microstrip Split Ring Resonator (SRR) (마이크로스트립 분리형 링 공진기를 이용한 RF 발진기 구현)

  • Kim, Girae
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.17 no.2
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    • pp.273-279
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    • 2013
  • In this paper, a novel split ring resonator is proposed for improvement of phase noise characteristics that is weak point of oscillator using planar type microstrip line resonator, and oscillator for 5.8GHz band is designed using proposed split ring resonator. At the fundamental frequency of 5.8GHz, 7.22dBm output power and -83.5 dBc@100kHz phase noise have been measured for oscillator with split ring resonator. The phase noise characteristics of oscillator is improved about 9.7dB compared to one using the general ${\lambda}$/4 microstrip resonator. Because it is possible that varactor diode or lumped capacitor is placed on the gaps of split ring resonator, resonant frequency can be controlled by bias voltage. We can design voltage controlled oscillator using proposed split ring resonator. Thus, due to its simple fabrication process and planar type, it is expected that the technique in this paper can be widely used for low phase noise oscillators for both MIC and MMIC applications.

Design and Implementation of VCO for X-band with Shorted Coupled C type Resonator (접지된 결합 C형 공진기를 이용한 X대역 전압제어 발진기 설계 및 구현)

  • Kim, Jong-hwa;Kim, Gi-rae
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.9 no.6
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    • pp.539-545
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    • 2016
  • In this paper, a novel coupled C type resonator is proposed for improvement of phase noise characteristics that is weak point of oscillator using planar type microstrip line resonator. Oscillator using proposed shorted coupled C type resonator is designed, it has improved phase noise characteristics. At the fundamental frequency of 9.8GHz, 4.87dBm output power and -84.7 dBc@100kHz phase noise have been measured for oscillator with shorted coupled C type resonator. Next, we designed voltage controlled oscillator using proposed shorted coupled C type resonator with varactor diode. The VCO has 33.8MHz tuning range from 9.7807GHz to 9.8145GHz, and phase noise characteristic is -115~-112.5dBc/Hz@100KHz. Due to its simple fabrication process and planar type, it is expected that the technique in this paper can be widely used for low phase noise oscillators for both MIC and MMIC applications.

Implementation and Design of the Voltage Controlled Oscillator Using Ring type DGS Resonator (링형 DGS 공진기를 이용한 전압제어 발진기의 설계 및 구현)

  • Kim, Girae
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.16 no.12
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    • pp.2589-2594
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    • 2012
  • In this paper, a novel resonator using ring type DGS is proposed for improvement of phase noise characteristics that is weak point of oscillator using planar type microstrip line resonator, and oscillator for 5.8 GHz band is designed using proposed DGS resonator. The ring type DGS resonator is composed of DGS cell etched on ground plane under $50{\Omega}$ microstrip line. At the fundamental frequency of 5.8 GHz, 7.6 dBm output power and -82.7 dBc@100kHz phase noise have been measured for oscillator with ring type DGS resonator. We designed the voltage controlled oscillator using proposed the DGS resonator with varactor diodes placed between gaps of DGS. Thus, due to its simple fabrication process and planar type, it is expected that the technique in this paper can be widely used for low phase noise oscillators for both MIC and MMIC applications.

Design of Ku-Band Phase Locked Harmonic Oscillator (Ku-Band용 위상 고정 고조파 발진기 설계)

  • Lee Kun-Joon;Kim Young-Sik
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.16 no.1 s.92
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    • pp.49-55
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    • 2005
  • In this paper, the phase locked harmonic oscillator(PLHO) using the analog PLL(Phase Locked Loop) is designed and implemented for a wireless LAN system. The harmonic oscillator is consisted of a ring resonator, a varactor diode and a PLL circuit. Because the fundamental fiequency of 8.5 GHz is used as the feedback signal for the PLL and the 2nd harmonic of 17.0 GHz is used as the output, a analog frequency divider for the phase comparison in the PLL system can be omitted. For the simple PLL circuit, the SPD(Sampling Phase Detector) as a phase comparator is used. The output power of the phase locked harmonic oscillator is 2.23 dBm at 17 GHz. The fundamental and 3rd harmonic suppressions are -31.5 dBc and -29.0 dBc, respectively. The measured phase noise characteristics are -87.6 dBc/Hz and -95.4 dBc/Hz at the of offset frequency of 1 kHz and 10 kHz from the carrier, respectively.

RF Oscillator Improved Characteristics of Phase Noise Using Ring type DGS (위상잡음을 개선한 링형 DGS 공진기를 이용한 RF 발진기)

  • Kim, Gi-Rae
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.16 no.8
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    • pp.1581-1586
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    • 2012
  • In this paper, a novel resonator using ring type DGS is proposed for improvement of phase noise characteristics that is weak point of oscillator using planar type microstrip line resonator, and oscillator for 5.8GHz band is designed using proposed DGS resonator. The ring type DGS resonator is composed of DGS cell etched on ground plane under $50{\Omega}$ microstrip line. At the fundamental frequency of 5.8GHz, 7.6dBm output power and -82.7 dBc@100kHz phase noise have been measured for oscillator with ring type DGS resonator. The phase noise characteristics of oscillator is improved about 9.5dB compared to one using the general ${\lambda}/4$ microstrip resonator. Because it is possible that varactor diode or lumped capacitor is placed on the gaps of ring type DGS, resonant frequency can be controlled by bias voltage. We can design voltage controlled oscillator using proposed ring type DGS resonator. Thus, due to its simple fabrication process and planar type, it is expected that the technique in this paper can be widely used for low phase noise oscillators for both MIC and MMIC applications.

Design of a 960MHz CMOS PLL Frequency Synthesizer with Quadrature LC VCO (960MHz Quadrature LC VCO를 이용한 CMOS PLL 주파수 합성기 설계)

  • Kim, Shin-Woong;Kim, Young-Sik
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.7
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    • pp.61-67
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    • 2009
  • This paper reports an Integer-N phase locked loop (PLL) frequency synthesizer which was implemented in a 250nm standard digital CMOS process for a UHF RFID wireless communication system. The main blocks of PLL have been designed including voltage controlled oscillator, phase frequency detector, and charge pump. The LC VCO has been used for a better noise property and low-power design. The source and drain juntions of PMOS transistors are used as the varactor diodes. The ADF4111 of Analog Device has been used for the external pre-scaler and N-divider to divide VCO frequency and a third order RC filter is designed for the loop filter. The measured results show that the RF output power is -13dBm with 50$\Omega$ load, the phase noise is -91.33dBc/Hz at 100KHz offset frequency, and the maximum lock-in time is less than 600us from 930MHz to 970MHz.