• Journal of Korean Vacuum Science & Technology
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• 제6권1호
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• pp.51-54
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• 2002

Polymer EL devices of glass/ITO/PI/MEH-PPV/Al structure were fabricated using spin coating and the Ionized Cluster Beam deposition technique. PMDA-ODA type thin polyimide films which can be used as a impurity blocking layer of EL device were deposited by ICB. According to our previous results, the packing densities of polyimide films were subject to change and depend on their deposition condition. By inserting a Pl layer with various thickness and packing density, I-V characteristics and life time of the devices were investigated to determine the role of a interlayer. The blocking of impurity diffusion from ITO to luminescent layer were confirmed by XPS.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2014년도 제46회 동계 정기학술대회 초록집
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• pp.365.2-365.2
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• 2014

Nickel sulfide (NiS) has been utilized in optoelectronic applications, such as transformation-toughening agent for materials used in semiconductor applications, catalysts, and cathodic materials in rechargeable lithium batteries. Recently, high quality nickel sulfide thin films have been explored using ALD/CVD technique. Suitable precursors are needed to deposit thin films of inorganic materials. However, nickel sulfide precursors available for ALD/CVD process are very limited to nickel complexes with dithiocarbamate and alkanethiolate ligands. Therefore, it is essential to prepare novel nickel sulfide suitable for ALD/CVD precesses. Herein we report on the synthesis and characterization of new nickel sulfide complex with designed aminothiolate ligand. Furthermore thin films of NiS have been prepared on silicon oxide substrates by spin coating nickel precursor 10 wt% in THF. The novel complex has been characterized by means of 1H-NMR, elemental analysis, thermogravimetric analysis (TGA), X-ray Diffraction (XRD) and scanning electron microscope (SEM).

• 한국정밀공학회지
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• 제13권6호
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• pp.45-51
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• 1996

Silicon wafers are required to be finished under the roughness of nanometer order for the subsequent chip fabrication processes. Recently, the finish grinding techniques have been researched for the improvement of accuracy and surface roughness simultaneously. Among them, the grinding technique using fine abrasive has been known as an easily accessible method. However, the manufacture of the fine grit grinding wheel has been very difficult because of the coherence of the grits. In this paper, the development of the ultrafine grit silica($SiO_2$) grinding wheel by the combination of the binder coating and the vacuum forming techniques is reported. And, the mechanochemical removal effects of the grinding conditions are discussed. Finally, a successful result of Ra O.4nm. Rmax 4nm in the ground surface roughness of a 6 inch silicon wafer was achieved.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2009년도 제38회 동계학술대회 초록집
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• pp.149-149
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• 2010

The double-layer antireflection (DLAR) coatings have significant advantages over single-layer antireflection (SLAR) coatings. This is because they will be able to cover a broad range of the solar spectrum which would enhance the overall performance of solar cells. Moreover films deposited at high frequency are expected to show excellent and UV-stable passivation in the refractive index that we adopted. In this work, we present a novel DLAR coating using SiNx:H thin films with refractive indices 1.9 and 2.3 as the top and bottom layers. This approach is cost effective when compared to earlier DLAR coatings with two different materials. SiNx:H films were deposited by Plasma enhanced chemical vapor deposition (PECVD) technique using $SiH_4$, $NH_3$ and $N_2$ gases with flow rates 20~80sccm, 200sccm and 85 sccm respectively. The RF power, plasma frequency and substrate temperature for the deposition were 300W, 13.56 MHz and $450^{\circ}C$, respectively. The optimum thickness and refractive indices values for DLAR coatings were estimated theoretically using Macleod simulation software as 82.24 nm for 1.9 and 68.58 nm for 2.3 respectively. Solar cells were fabricated with SLAR and DLAR coatings of SiNx:H films and compared the cell efficacy. SiNx:H> films deposited at a substrate temperature of $450^{\circ}C$ and that at 300 W power showed best effective minority carrier lifetime around $50.8\;{\mu}s$. Average reflectance values of SLAR coatings with refractive indices 1.9, 2.05 and 2.3 were 10.1%, 9.66% and 9.33% respectively. In contrast, optimized DLAR coating showed a reflectance value as low as 8.98% in the wavelength range 300nm - 1100nm.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2015년도 제49회 하계 정기학술대회 초록집
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• pp.181.2-181.2
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• 2015

Sputtering is one of the most popular physical deposition methods due to their versatility and reproducibility. Synthesis of Cr thin films by DC magnetron sputtering using glancing angle deposition (GLAD) has been reported. Chromium thin films have been prepared at two different working pressure($2.0{\times}10-2$, 30, $3.3{\times}10-3torr$) on Si-wafer substrate using magnetron sputtering with glancing angle deposition (GLAD) technique. The thickness of Cr thin films on the substrate was adjusted about 1 mm. The electrical property was measured by four-point probe method. For the measurement of density in the films, an X-ray reflectivity (XRR) was carried out. The sheet resistance and column angle increased with the increase of glancing angle. However, nanohardness and density of Cr thin films decreased as the glancing angle increased. The measured density for the Cr thin films decreased from 6.1 to 3.8 g/cc as the glancing angle increased from $0^{\circ}$ to $90^{\circ}$ degree. The low density of Cr thin films is resulted from the isolated columnar structure of samples. The evolution of the isolated columnar structure was enhanced at the conditions of low sputter pressure and high glancing angle. This GLAD technique can be potentially applied to the synthesis of thin films requiring porous and uniform coating such as thin film catalysts or gas sensors.

• 한국정밀공학회지
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• 제31권11호
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• pp.969-974
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• 2014

Previously fabricated electronic devices were used for vacuum manufacturing processes such as conventional semiconductor manufacturing. However, they are difficult to apply to continuous processes such as roll-to-roll printing, which results in very high device manufacturing and processing costs. Therefore, many developers have been interested in applying continuous processes to contact printing or noncontact printing technologies and they proposed various continuous printing techniques instead of conventional batch coating. In this paper, we proposed improved gravure offset printing process as one of the contact printing technique. We used etching pattern geometry with soft core blanket roll for printing of ultra fine line below the 10um.Using this technique we obtained flexible metal grid mesh film as transparent conductive film.

• 한국세라믹학회지
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• 제40권10호
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• pp.931-935
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• 2003

A complex-shaped part was successfully fabricated by Laminate Object Manufacturing (LOM) technique using silicon nitride tape with aligned silicon nitride whisker seeds. The ceramic tape was cut using a commercial cutting plotter according to the cross section drafts generated by slicing a 3-D model, and then the tapes were stacked sequentially. In order to improve adhesion between the tapes, stacking was performed under vacuum. After binder burnout, the part was encapsulated using latex emulsion and was cold isostaically pressed under 250 ㎫. It was sintered to 98.5% TD at 2148 K for 4 h under 2 ㎫ nitrogen pressure.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2009년도 제38회 동계학술대회 초록집
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• pp.356-356
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• 2010

Tribological behaviors of the hard film on soft substrate system were explored using the hard thin film of diamond-like carbon (DLC) coated the soft polymer of polydimethysiloxane (PDMS). A DLC film with the Young's modulus of 100 GPa was coated on PDMS substrate with Young's modulus of 10 MPa using plasma enhanced chemical vapor deposition (PECVD) technique. The deposition time was varied from 10 sec to 10 min, resulting in nanoscale roughness of wrinkle patterns with the thickness of 20 nm to 510 nm, respectively, at a bias voltage of $400\;V_b$, working pressure 10 mTorr. Nanoscale wrinkle patterns with 20-100 nm in width and 10-30 nm height were formed on DLC coating due to the residual stress in compression and difference in Young's modulus. Nanoscale roughness effect on tribological behaviors was observed by performing a tribo-experiment using the ball-on-disk type tribometer with a steel ball of 6 mm in diameter at the sliding speed of 220 rpm, normal load of 1N and 25% humidity at ambient temperature of $25^{\circ}C$. Friction force were measured with respect to thickness change of coated DLC thin film on PDMS. It was found that with increases the thickness of DLC coating on PDMS, the coefficient of friction decreased by comparison to that of the uncoated PDMS. The wear tracks before and after tribo-test were analyzed using SEM and AFM.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2016년도 제50회 동계 정기학술대회 초록집
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• pp.347.2-347.2
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• 2016

Recently, in order to improve the performance of the colloidal quantum dot solar cells (CQDSCs), various efforts such as the modification of the cell architecture and surface treatment for quantum dot (QD) passivation have been made. Especially, the incorporation of halides into the QD matrix was reported to improve the performances significantly via passivating QD trap states that lower the life-time of the minority-carrier. In this work, we fabricated a lead sulfide (PbS) QD bilayer treated with different ligands and utilized it as a photoactive layer of the CQDSCs. The bottom and top PbS layer was treated using metal iodide ($MI_x$ and butanedithiol (BuDT), respectively. All the depositions and ligand treatments were carried out in air using layer-by-layer spin-coating process. The fabrication of the active layers as well as the n-type zinc oxide (ZnO) layer was successfully carried out on the bendable indium-tin-oxide (ITO)-coated polyethylene terephthalate (PET) substrate, which implies that this technique can be applied to the fabrication of flexible and/or wearable solar cells. The power conversion efficiency (PCE) of the CQDSCs with the architecture of $PET/ITO/ZnO/PbS-MI_x/PbS-BuDT/MoO_x/Ag$ reached 4.2 %, which is significantly larger than that of the cells with single QD (PbS-BuDT) layer.

• 한국진공학회지
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• 제5권4호
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• pp.309-314
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• 1996

VLSI 공정에 평탄화를 위하여 사용되는 SOG과 AFM lithography에 resist 재료로서 이용되는 것이 확인되었다. 이에 기초하여, 본 연구는, SOG가 VLSI lithography 공정에 이용되기 위한 coating막 두께의 가변, 현상을 위한 etching time 및 etching selectivity의 가변, 패턴의 크기에 따르는 적정 공급전압을 선택 등으로 공정의 여유도를 크게 개선하였다. 공급전압 60V, FE 전류량 5nA로서 800$\AA$의 fine 패턴을 얻었다. 차세대 DRAM 제작공정 기술을 위한 AFM lithography에 있어서, SOG의 사용은 공정 여유도가 양호함에 의하여 크게 전망되는 기술이 될 것이다.