• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.21 no.5
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• pp.468-474
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• 2010

In this paper, a VCHO(Voltage Controlled Harmonic Oscillator) for K-band application has been designed and implemented. The proposed oscillator has a structure of two hair-pin resonators placed on input and output of active device. Using in/out common frequency tuning structure, the VCHO yields some advantages of the enhanced fundamental frequency suppression characteristic as well as the improved output power of second harmonic. According to implementation and measurement results, it was shown that a VCHO provides an output power of -2.41 dBm, a fundamental frequency suppression of -21.84 dBc, and phase noise of -101.44 dBc/Hz at 100 kHz offset. In addition, as for the bias voltage from 0 V to -10 V for the varactor diode, output frequency range of 10.58 MHz is obtained with a power variation of ${\pm}0.19\;dB$ over its frequency range.

• IEIE Transactions on Smart Processing and Computing
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• v.4 no.3
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• pp.145-148
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• 2015

In this letter, we present a new linearization method for a voltage controlled oscillator (VCO)-based quantizer in an analog-to-digital converter (ADC). The nonlinearity of the VCO generates unwanted harmonic spurs and reduces the signal-to-noise and distortion ratio (SNDR) of the VCO-based quantizer. This letter suggests a frequency-to-current feedback method to effectively suppress harmonic distortion. The proposed method decreases the harmonic spurs by more than 53 dB. And a VCO-based quantizer employing the proposed linearization method achieves a high SNDR of 74.1 dB.

• Journal of Electrical Engineering and Technology
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• v.5 no.1
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• pp.151-155
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• 2010

Reconfigurable radio technology is needed to reconstruct frequency and modem functionality, which can be different in various regions. In addition, it makes a single mobile handset capable of supporting various standards of wireless communication and thus plays a key role in mobile convergence. An MMIC VCO (voltage controlled oscillator) has been developed for high power and wide bandwidth where Clapp-Gouriet type oscillators are adapted for series feedback, and was fabricated based on 0.15um pHEMT of TRW. The MMIC VCO was connected to an aluminar substrate on the carrier for testing. This MMIC VCO module showed good performance in comparison to existing works. Furthermore, it can be potentially extended to reconfigure an MMIC VCO for wireless systems such as military applications and satellite communications.

• International journal of advanced smart convergence
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• v.10 no.3
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• pp.81-88
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• 2021

This paper proposes two types of subharmonic RF receiver front-end (called LMV) where, in a single stage, quadrature voltage-controlled oscillator (QVCO) is stacked on top of a low noise amplifier. Since the QVCO itself plays the role of the single-balanced subharmonic mixer with the dc current reuse technique by stacking, the proposed topology can remove the RF mixer component in the RF front-end and thus reduce the chip size and the power consumption. Another advantage of the proposed topologies is that many challenges of the direct conversion receiver can be easily evaded with the subharmonic mixing in the QVCO itself. The intermediate frequency signal can be directly extracted at the center taps of the two inductors of the QVCO. Using a 65 nm complementary metal oxide semiconductor (CMOS) technology, the proposed subharmonic RF front-ends are designed. Oscillating at around 2.4 GHz band, the proposed subharmonic LMVs are compared in terms of phase noise, voltage conversion gain and double sideband noise figure. The subharmonic LMVs consume about 330 ㎼ dc power from a 1-V supply.

• Journal of electromagnetic engineering and science
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• v.9 no.2
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• pp.98-104
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• 2009

An InGaP/GaAs MMIC LC VCO designed with Harmonic Noise Frequency Filtering(HNFF) technique is presented. In this VCO, internal inductance is found to lower the phase noise, based on an analytic understanding of phase noise. This VCO directly drives the on-chip double balanced mixer to convert RF carrier to IF frequency through local oscillator. Furthermore, final power performance is improved by output amplifier. This paper presents the design for a 1.721 GHz enhanced LC VCO, high power double balance mixer, and output amplifier that have been designed to optimize low phase noise and high output power. The presented asymmetric inductance tank(AIT) VCO exhibited a phase noise of -133.96 dBc/Hz at 1 MHz offset and a tuning range from 1.46 GHz to 1.721 GHz. In measurement, on-chip down-converter shows a third-order input intercept point(IIP3) of 12.55 dBm, a third-order output intercept point(OIP3) of 21.45 dBm, an RF return loss of -31 dB, and an IF return loss of -26 dB. The RF-IF isolation is -57 dB. Also, a conversion gain is 8.9 dB through output amplifier. The total on-chip down-converter is implanted in 2.56${\times}$1.07 mm$^2$ of chip area.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.16 no.4 s.95
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• pp.345-350
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• 2005

An X-band push-push VCO for low cost applications is proposed. The designed push-push oscillator achieves a wide tuning range in the X-band by the collector bias tuning instead of extra varactor diodes. The measurement shows a wide tuning bandwidth of $900\;\cal{MHz}\;from\;10.9\;\cal{GHz}\;to\;11.8\;\cal{GHz}$ with a drain bias voltage varying from 4 to 9 V, excellent fudamental suppression of $-30\;\cal{dBc}$ and good phase noise of $-115\;\cal{dBc/Hz}\;@\;1\;\cal{MHz}$ offset.

• JSTS:Journal of Semiconductor Technology and Science
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• v.9 no.3
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• pp.153-159
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• 2009

A CMOS frequency synthesizer for $5{\sim}6$ GHz UNII-band sub-harmonic direct-conversion receiver has been developed. For quadrature down-conversion with sub-harmonic mixing, octa-phase local oscillator (LO) signals are generated by an integer-N type phase-locked loop (PLL) frequency synthesizer. The complex timing issue of feedback divider of the PLL with large division ratio is solved by using multimodulus prescaler. Phase noise of the local oscillator signal is improved by employing the ring-type LC-tank oscillator and switching its tail current source. Implemented in a $0.18{\mu}m$ CMOS technology, the phase noise of the LO signal is lower than -80 dBc/Hz and -113 dBc/Hz at 100 kHz and 1MHz offset, respect-tively. The measured reference spur is lower than -70 dBc and the power consumption is 40 m W from a 1.8 V supply voltage.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.41 no.5
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• pp.63-68
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• 2004

This paper presents a design of 12㎓ VCBRO(voltage controlled dielectric resonator oscillator) using a novel PBG(photonic band gap) ground plane and a varactor circuit that enhances the frequency linearity of VCO with different bias to varactors. The PBG structures are used for suppressing the second and third harmonics without any filters. To simulate the accurate resonating frequency, a DR coupled with microstrip lines is analysed by FTM(finite element method) simulation, and the results are transformed into scattering parameters to design the VCO. Some measured results are presented to show the usefulness of the proposed techniques.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.13 no.7
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• pp.649-656
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• 2002

This paper addresses the phase noise analysis of high-speed DH-PLL(Digital Hybrid Phase-Locked Loops) frequency synthesizer. Because of the additional quantization noise of D/A converter in DH-PLL, the phase noise of DH-PLL is increased than the conventional PLL. Three kinds of noise sources such as reference input, D/A converter, and VCO(Voltage Controlled Oscillator) are considered to analyze the phase noise. It largely depends on the closed loop bandwidth and frequency synthesis division ratio(N) so that we can decide the optimal closed loop bandwidth to minimize the phase noise of DH-PLL. It is shown that the simulation results closely match with the results of analytical approach.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.21 no.3
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• pp.223-228
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• 2010

In this paper, temperature compensation circuit for the X-band voltage controlled oscillator(VCO) is presented by using the temperature sensor with the OP-AMP circuit. The frequency drifting by the temperature could be compensated by applying the tuning voltage which include the linearly changing output voltage of the temperature sensor. As a result, the frequency variation is reduced to 6.6~4.4 MHzfrom the 71~73 MHz variation with the compensation circuit over -30~+$60^{\circ}C$ range, when VCO is operated in the frequency range of 9.95~10.05 GHz.