• Title/Summary/Keyword: V2V communications

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Design of a CMOS PLL with a Current Pumping Algorithm for Clock Syncronization (전류펌핑 알고리즘을 이용한 클락 동기용 CMOS PLL 설계)

  • 성혁준;윤광섭;강진구
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.25 no.1B
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    • pp.183-192
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    • 2000
  • In this paper, the dual looped CMOS PLL with 3-250MHz input locking range at a single 13.3V is designed. This paper proposed a new PLL architecture with a current pumping algorithm to improve voltage-to-frequencylinearity of VCO(Voltage Controlled Oscillator). The designed VCO operates at a wide frequency range of75.8MHz-lGHz with a high linearity. Also, PFD(Phase frequency Detector) circuit preventing voltage fluctuation of the charge pump with loop filter circuit under the locked condition is designed. The simulation results of the PLL using 0.6 um N-well single poly triple metal CMOS technology illustrate a locking time of 3.5 us, a power dissipation of 92mW at 1GHz operating frequency with 125MHz of input frequency. Measured results show that the phase noise of VCO with V-I converter is -100.3dBc/Hz at a 100kHz offset frequency.

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Design and fabrication of the surface mountable VCO operating at 3V for PCS handset (3V에 동작하는 PCS 단말기용 표면실장형 전압제어 발전기의 설계 및 제작)

  • 염경환
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.21 no.3
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    • pp.784-794
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    • 1996
  • In this papre, the design and the fabrication of the surface mountable voltage controlled oscillator is described for local oscillator in PCS(WACS/TDMA) handset. The VCO employs two silicon bipolar transistors of $f_{gamma}$ of 4 GHz as active devices. These are asembled to form the VCO on the 4 layer PCB of the size $12{\times}10mm$which provides the strip line resonator at the third layer. The fabricated VCO shows tuning rage over 50 MHz, phase noise -100 dBc/Hz at the 100 kHz frequency offset, and 0 dBm output power with the consumption of 22 mA at 3V. It is belived that the size will be more reduced by employing 1005 chip components and that the current consumption will be improved by employing transistors of higher $f_{gamma}$.

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Design of Navigation Model of Applying Lane Detection Algorithm of Road based on iBeacon (iBeacon 통신 기반 도로 차선 감지 알고리즘을 적용한 내비게이션 모델 설계)

  • Shin, Hyun-Ho;Jung, Hyun-Hee;Nam, Choon-Sung;Shin, Dong-Ryeol
    • Proceedings of the Korean Society of Computer Information Conference
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    • 2015.01a
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    • pp.169-170
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    • 2015
  • 본 논문에서는 근거리 통신에 적합한 BLE(Bluetooth Low Energy) 기반의 iBeacon을 신호를 이용해 차선분류를 차선 감지 알고리즘을 정의하였다. 내비게이션의 목적지 안내 서비스의 정확성 및 효율성을 높이기 위해 차선 감지 알고리즘을 적용한 내비게이션 모델을 설계하였다.

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A High Speed CMOS Arrayed Optical Transmitter for WPON Applications (WPON 응용을 위한 고속 CMOS어레이 광트랜스미터)

  • Yang, Choong-Reol;Lee, Sang-Soo
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.38B no.6
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    • pp.427-434
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    • 2013
  • In this paper, the design and layout of a 2.5 Gbps arrayed VCSEL driver for optical transceiver having arrayed multi-channel of integrating module is confirmed. In this paper, a 4 channel 2.5 Gbps VCSEL (vertical cavity surface emitting laser) driver array with automatic optical power control is implemented using $0.18{\mu}m$ CMOS process technology that drives a $1550{\mu}m$ high speed VCSEL used in optical transceiver. To enhance the bandwidth of the optical transmitter, active feedback amplifier with negative capacitance compensation is exploited. We report a distinct improvement in bandwidth, voltage gain and operation stability at 2.5Gbps data rate in comparison with existing topology. The 4-CH chip consumes only 140 mW of DC power at a single 1.8V supply under the maximum modulation and bias currents, and occupies the die area of $850{\mu}m{\times}1,690{\mu}m$ excluding bonding pads.

AMOLED Panel Using Transparent Bottom Gate IGZO TFT (Bottom Gate IGZO 박막트랜지스터를 이용한 투명 AMOLED 패널 제작)

  • Cho, D.H.;Yang, S.H.;Byun, C.W.;Shin, J.H.;Lee, J.I.;Park, E.S.;Kwon, O.S.;Hwang, C.S.;Chu, H.Y.;Cho, K.I.
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2008.04a
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    • pp.39-40
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    • 2008
  • We have examined post-annealing and passivation for the transparent bottom gate IGZO TFT having an inverse co-planar structure. The oxygen-vacuum two step annealing enhanced the field effect mobility up to 18 $cm^2$/Vsandthesub-threshold swing down to 0.2V/dec. However, the hysterysis and the bias stability problems could not be solved just by post-annealing. Thus, we have passivated the bottom gate IGZO TFTs with organic and inorganic materials. $Ga_2O_3$, $Al_2O_3$, $SiO_2$ and some polymer materials were effective materials for passivations. The hysterysis and the stability of the TFTs were remarkably improved by the passivations. We have manufactured the AMOLED panel with the transparent bottom gate IGZO TFT array successfully.

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A 2.4 GHz CMOS LC VCO with Phase Noise Optimization

  • Yan, Wen-Hao;Park, Chan-Hyeong
    • Proceedings of the IEEK Conference
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    • 2008.06a
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    • pp.413-414
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    • 2008
  • A 2.4 GHz low phase noise fully integrated LC voltage-controlled oscillator (VCO) in $0.18\;{\mu}m$ CMOS technology is presented in this paper. The VCO is optimized based on phase noise reduction. The design of the VCO uses differential varactors which are adopted for symmetry of the circuit, and consider AM-PM conversion due to a cross-coupled pair. The VCO is designed to draw 3 mA from 1.8 V supply voltage. Simulated phase noise is -137.3 dBc/Hz at 3 MHz offset. The tuning range is found to be 300 MHz range from 2.3 GHz to 2.6 GHz.

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Design of Low Power CMOS LNA for 2.4 GHz ZigBee Applications (2.4 GHz ZigBee 응용을 위한 저전력 CMOS LNA 설계)

  • Cho In-Shin;Yeom Kee-Soo
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2006.05a
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    • pp.259-262
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    • 2006
  • This paper presents a design of low power CMOS LNA(Low Noise Amplifier) for 2.4 GHz ZigBee applications. The proposed circuit has been designed by using TSMC $0.18{\mu}m$ CMOS process and current-reused two-stage cascade topology. LNA design procedures and the simulation results using ADS(Advanced Design System) are presented in this paper. Simulation results shows that the LNA has a extremely low power dissipation of 1.38mW with a $V_{DD}$ of 1.0V. The LNA also has a maximum gain of 13.38dB, input return loss of -20.37dB, output return loss of -22.48dB and noise figure of 1.13dB.

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Low Reverse Saturation Current Density of Amorphous Silicon Solar Cell Due to Reduced Thickness of Active Layer

  • Iftiquar, S M;Yi, Junsin
    • Journal of Electrical Engineering and Technology
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    • v.11 no.4
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    • pp.939-942
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    • 2016
  • One of the most important characteristic curves of a solar cell is its current density-voltage (J-V) curve under AM1.5G insolation. Solar cell can be considered as a semiconductor diode, so a diode equivalent model was used to estimate its parameters from the J-V curve by numerical simulation. Active layer plays an important role in operation of a solar cell. We investigated the effect thicknesses and defect densities (Nd) of the active layer on the J-V curve. When the active layer thickness was varied (for Nd = 8×1017 cm-3) from 800 nm to 100 nm, the reverse saturation current density (Jo) changed from 3.56×10-5 A/cm2 to 9.62×10-11 A/cm2 and its ideality factor (n) changed from 5.28 to 2.02. For a reduced defect density (Nd = 4×1015 cm-3), the n remained within 1.45≤n≤1.92 for the same thickness range. A small increase in shunt resistance and almost no change in series resistance were observed in these cells. The low reverse saturation current density (Jo = 9.62×10-11 A/cm2) and diode ideality factor (n = 2.02 or 1.45) were observed for amorphous silicon based solar cell with 100 nm thick active layer.

Performances Evaluation of Ka Band Communications Transponder for COMS (통신해양기상위성 Ka 대역 통신탑재체 성능검증)

  • Lee, Yong-Min;Lee, Seong-Pal
    • Journal of Satellite, Information and Communications
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    • v.3 no.2
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    • pp.43-47
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    • 2008
  • COMS is the one of Korean hybrid geostationary satellite and is scheduled to be launched in 2009 by Arian V into $128^{\circ}$ E longitude. COMS is designed and manufactured for three main objectives which are Communications, Oceanographic, and Meteorological missions. It provides the weather monitoring, ocean monitoring, and Ka band satellite communication services by means of three different payloads. The Ka band communications payload was developed by Electronics and Telecommunications Research Institute (ETRI), and provides not only the digital transmission for the communication services against natural disaster but also digital transmission for the high speed multimedia services. This paper describes the overview of the electrical and mechanical design and measured performances of the Ka band communications transponder flight model (FM) for COMS.

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Design and Analysis of Linear Channel-Selection Filter for Direct Conversion Receiver

  • Jin, Sang-Su;Ryu, Seong-Han;Kim, Hui-Jung;Kim, Bum-Man;Lee, Jong-Ryul
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.4 no.4
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    • pp.293-299
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    • 2004
  • An active RC 2nd order Butterworth filter suitable for a baseband channel-selection filter of a direct conversion receiver is presented. The linearity of the 2nd order Butterworth filter is analyzed. In order to improve the linearity of the filter, the operational amplifiers should have a high linear gain and low 3rd harmonic, and the filter should be designed to have large feedback factor. This second order Butterworth filter achieves-14dBV in-channel (400kHz, 500kHz) IIP3, +29dBV out-channel (10MHz, 20.2MHz) IIP3 and 15.6 $nV/\sqrt{Hz}$ input-referred noise and dissipates 10.8mW from a 2.7-V supply. The analysis and experimental results are in good agreement