• Title/Summary/Keyword: Universal Asynchronous Receiver/Transmitter(UART)

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UART-to-APB Interface Circuit Design for Testing a Chip (칩 테스트를 위한 UART-to-APB 인터페이스 회로의 설계)

  • Seo, Young-Ho;Kim, Dong-wook
    • Journal of Advanced Navigation Technology
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    • v.21 no.4
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    • pp.386-393
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    • 2017
  • Field programmable gate arrays (FPGAs) are widely used for verification in chip development. In order to verify the circuit programmed to the FPGA, data must be input to the FPGA. There are many ways to communicate with a chip through a PC and an external board, but the simplest and easiest way is to use a universal asynchronous receiver/transmitter (UART). Most recently, most circuits are designed to be internally connected to the advanced microcontroller bus architecture (AMBA) bus. In other words, to verify the designed circuit easily and simply, data must be transmitted through the AMBA bus through the UART. Also the AMBA bus has been available in various versions since version 4.0 recently. Advanced peripheral bus (APB) is suitable for simple testing. In this paper, we design a circuit for UART-to-APB interface. Circuits designed using Verilog-HDL were implemented in Altera Cyclone FPGAs and were capable of operating at speeds up to 380 MHz.

Multiple UART Communications Using CAN Bus (CAN 버스를 이용한 다중 UART 통신)

  • Kang, Tae-Wook;Lee, Seongsoo
    • Journal of IKEEE
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    • v.24 no.4
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    • pp.1184-1187
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    • 2020
  • This paper proposes an in-vehicle network controller fully exploiting the advantages of UART (Universal Asynchronous Receiver/Transmitter) and CAN (Controller Area Network). UART is used in 1-to-1 communication and it exploits parity bit for data integrity check. The proposed in-vehicle network controller converts UART into CAN, which enables multiple communications along with 1-to-1 communication. Also, the proposed in-vehicle network controller exploits CRC (cyclic redundancy check) for data integrity check, which increases communication reliability. CAN is controlled by microprocessor, but the proposed in-vehicle network controller can be controlled by any devices compliant with RS-232, RS-422, and RS-485.

Implementation of Radio Frequency Communication System based Serial UART Communication (직렬 UART 통신 기반 rf 통신 시스템 구현)

  • Jin, Hyun-Soo
    • Journal of Digital Convergence
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    • v.12 no.12
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    • pp.257-264
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    • 2014
  • Through MCU model, Radio Frequency communication is completed using universal asynchronous receiver and transmitter. The communicatin with PC and MCU is completed using RS-232 cable. At first interconnected communication with PC and MCU is necessary for RF communication because tha UART is based technique for RF communication. Program imbeded in microcontroller unit is ran during RF signal is transmitted to other RF module. Data connected with PC and MCU is transmitted between PC and MCU during PC and MCU is connected.

Design and Implementation of Secure UART based on Digital Signature and Encryption (디지털 서명과 암호화 기반 보안 UART의 설계와 구현)

  • Kim, Ju Hyeon;Joo, Young Jin;Hur, Ara;Cho, Min Kyoung;Ryu, Yeon Seung;Lee, Gyu Ho;Jang, Woo Hyun;Yu, Jae Gwan
    • Convergence Security Journal
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    • v.21 no.2
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    • pp.29-35
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    • 2021
  • UART (Universal asynchronous receiver/transmitter) is a hardware device that converts data into serial format and transmits it, and is widely used for system diagnosis and debugging in most embedded systems. Hackers can access system memory or firmware by using the functions of UART, and can take over the system by acquiring administrator rights of the system. In this paper, we studied secure UART to protect against hacker attacks through UART. In the proposed scheme, only authorized users using the promised UART communication protocol are allowed to access UART and unauthorized access is not allowed. In addition, data is encrypted and transmitted to prevent protocol analysis through sniffing. The proposed UART technique was implemented in an embedded Linux system and performance evaluation was performed.

VLSI design of a UART for IP module (IP module를 위한 UART의 VLSI 설계)

  • 박성일;최병윤
    • Proceedings of the Korea Multimedia Society Conference
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    • 2002.05c
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    • pp.1-5
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    • 2002
  • 본 논문에서는 UART(Universal Asynchronous Receiver-Transmitter)를 soft IP(Intellectual Property) 모듈 형태로써 VLSI 설계과정을 통하여 구현하였다. 이 모듈은 현재 각종 통신 디바이스에서 최하 말단에서 직렬 데이터를 시스템으로 받아들이거나 병렬 데이터를 직렬 라인에 실어 보내는 중요한 역할을 담당한다. 본 연구에서 설계한 UART는 간단한 모듈 형태로 제작되어 있어 Verilog-HDL을 사용하여 직렬 송ㆍ수신을 필요로 하는 시스템에 내장되어 사용될 수 있다. 본 논문에서는 설계 순서에 따라 UART를 설계하고 Simulation을 하고 Synopsys Tool을 사용하여 Compile 과 Synthesis 후 Gate Area 와 Belay를 검출해 내었다. 합성결과 0.25$\mu$m 공정의 CMOS Cell Library를 사용하였을 경우 전체 면적은 1,013 gate가 나왔다. 본 논문에서 설계한 UART의 최장경로가 최대 4.12ns로 나타났으며, 최대 동작 클럭 주파수는 200MHz 로써 150Mbps 이상의 전송 속도를 가진다.

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FPGA Design and SoC Implementation of Constant-Amplitude Multicode Bi-Orthogonal Modulation (정진폭 다중 부호 이진 직교 변복조기의 FPGA 설계 및 SoC 구현)

  • Hong, Dae-Ki;Kim, Yong-Seong;Kim, Sun-Hee;Cho, Jin-Woong;Kang, Sung-Jin
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.32 no.11C
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    • pp.1102-1110
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    • 2007
  • In this paper, we design the FPGA (Field-Programmable Gate Array) of the CAMB (Constant-Amplitude Multi-code Biorthogonal) modulation, and implement the SoC (System on Chip). The ASIC (Application Specific Integrated Circuit) chip is be implemented through targeting and board test. This 12Mbps modem SoC includes the ARM (Advanced RISC Machine)7TDMI, 64Kbyte SRAM(Static Random Access Memory) and ADC (Analog to Digital Converter)/DAC (Digital to Analog Converter) for flexible applications. Additionally, the modem SoC can support the variable communication interfaces such as the 16-bits PCMCIA (Personal Computer Memory Card International Association), USB (Universal Serial Bus) 1.1, and 16C550 Compatible UART (Universal Asynchronous Receiver/Transmitter).

A Study on the Tele-controller System of Navigational Aids Using Hybrid Communication (하이브리드 통신을 이용한 항로표지의 원격관리 제어시스템에 관한 연구)

  • Jeon, Joong-Sung;Oh, Jin-Seok
    • Journal of Advanced Marine Engineering and Technology
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    • v.35 no.6
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    • pp.842-848
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    • 2011
  • A fabricated hybrid control board using multi-communication is designed with a low power 8-bit microcontroller, ATxmega128A1. The microcontroller consists of 8 UART (Universal asynchronous receiver/transmitter) ports, 2 kbytes EEPROM, 128 kbytes flash memory, 8 kbytes SRAM. The 8 URAT ports are used for a multi-communication modem, a GPS module, etc. The EEPROM is used for saving a configuration for running programs, and the flash memory of 128 kbytes is used for storing a F/W (Firm Ware), and the 8 kbytes SRAM is used for stack and for storing memory of global variables while running programs. If we use the multi-communication of CDMA, TRS and RF to remotely control Aid to Navigation, it is able to remove the communication shadow area. Even though there is a shadow area for an individual communication method, we can select an optimal communication method. The compatibility of data has been enhanced as using of same data frame per communication device. For the test, 8640 of data have been collected from each buoy during 30 days in every 5 minutes and the receiving rate of the data has shown more than 85 %.

항로표지관리용 하이브리드 통신 시스템에 관한 연구

  • Jeon, Jung-Seong;Kim, Jong-Uk;Lee, Yong-An
    • Proceedings of the Korean Institute of Navigation and Port Research Conference
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    • 2012.10a
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    • pp.391-392
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    • 2012
  • 항로표지의 원격 관리를 VHF, CDMA, TRS의 경로설정 최적화(Path Optimization) 기능을 갖는 하이브리드 통신을 이용하면 개별 통신 방식별로 음영지역이 존재하는 경우에도, 최적의 통신방식을 선택하여 통신을 수행하게 됨으로써, 통신 음영지역의 해소가 가능하다. 또한 통신장치마다 동일한 데이터 프레임을 사용함으로써 데이터의 호환성을 높였다. 실험은 30일 동안 각 부표에서 매 5분마다 데이터를 취득하였으며, 데이터 수신율은 99.4 % 이상을 보였다.

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A VHDL Design of UART(Universal Asynchronous Receiver Transmitter) Device (UART 디바이스의 VHDL 설계)

  • 김성중;손승일
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2004.05b
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    • pp.669-673
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    • 2004
  • 인터넷의 사용이 증가, 네트워크 기술이 발달하면서 컴퓨터 및 하드웨어 장비는 고속화 대용량화, 소형화 추세로 가고 있고, 기존에 외부 인터페이스와의 데이터 송수신 또한 병렬 포트를 이용한 통신이 많았으나, 외부 장비의 소형화와 고속화 그리고 휴대화가 요구되면서 차츰 직렬 포트를 이용하여 적은 전송라인을 이용한 외부 장비와의 인터페이스가 요구 되게 되었다. 본 논문에서는 내부 모듈간의 인터페이스와 외부 장치와의 데이터 송/수신이 가능한 UART 인터페이스 모듈을 하드웨어 설계언어인 VHDL 언어를 이용하여 설계하였으며, FPGA 칩인 Xilinx(Spartan II) 데스트 보드에 다운로드하여 시뮬레이션 하였다. 또한 양방향성 공통 버스로의 인터페이스 회로 설계와 다른 클럭으로 동작하는 시스템과의 비동기 회로의 동작 메커니즘을 쉽게 설계하였고, 비동기 통신 기능에 있어서 실제로 사용이 가능하도록 설계하였다.

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Communications Link Design and Analysis of the NEXTSat-1 for SoH File and Mission Data Using CAN Bus, UART and SerDesLVDS

  • Shin, Goo-Hwan;Chae, Jang-Soo;Min, Kyung-Wook;Sohn, Jong-Dae;Jeong, Woong-Seob;Lee, Dae-Hee
    • Journal of Astronomy and Space Sciences
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    • v.31 no.3
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    • pp.235-240
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    • 2014
  • The communications link in a space program is a crucial point for upgrading its performance by handling data between spacecraft bus and payloads, because spacecraft's missions are related to the data handling mechanism using communications ports such as a controlled area network bus (CAN Bus) and a universal asynchronous receiver and transmitter (UART). The NEXTSat-1 has a lot of communications ports for performing science and technology missions. However, the top level system requirements for the NEXTSat-1 are mass and volume limitations. Normally, the communications for units shall be conducted by using point to point link which require more mass and volume to interconnect. Thus, our approach for the novel communications link in the NEXTSat-1 program is to use CAN and serializer and deserializer low voltage differential signal (SerDesLVDS) to meet the system requirements of mass and volume. The CAN Bus and SerDesLVDS were confirmed by using already defined communications link for our missions in the NEXTSat-1 program and the analysis results were reported in this study in view of data flow and size analysis.