• Journal of Sensor Science and Technology
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• v.13 no.2
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• pp.128-132
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• 2004

Short wave infrared (SWIR) photovoltaic devices have been fabricated from metal organic vapour phase epitaxy (MOVPE) grown n- on p- HgCdTe films on GaAs substrates. The MOVPE grown films were processed into mesa type discrete devices with wet chemical etching employed for meas delineation and ZnS surface passivatlon. ZnS was thermally evaporated from effusion cell in an ultra high vacuum (UHV) chamber. The main features of the ZnS deposited from effusion cell in UHV chamber are low fixed surface charge density, and small hysteresis. It was found that a negative flat band voltage with -0.6 V has been obtained for Metal Insulator Semiconductor (MIS) capacitor which was evaporated at $910^{\circ}C$ for 90 min. Current-Voltage (I-V) and temperature dependence of the I-V characteristics were measured in the temperature range 80 - 300 K. The Zero bias dynamic resistance-area product ($R_{0}A$) was about $7500{\Omega}-cm^{2}$ at room temperature. The physical mechanisms that dominate dark current properties in the HgCdTe photodiodes are examined by the dependence of the $R_{0}A$ product upon reciprocal temperature. From theoretical considerations and known current expressions for thermal and tunnelling process, the device is shown to be diffusion limited up to 180 K and g-r limited at temperature below this.

• ETRI Journal
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• v.41 no.2
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• pp.254-261
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• 2019

Distinct from conventional energy-harvesting (EH) technologies, such as the use of photovoltaic, piezoelectric, and thermoelectric effects, betavoltaic energy conversion can consistently generate uniform electric power, independent of environmental variations, and provide a constant output of high DC voltage, even under conditions of ultra-low-power EH. It can also dramatically reduce the energy loss incurred in the processes of voltage boosting and regulation. This study realized betavoltaic cells comprised of p-i-n junctions based on silicon carbide, fabricated through a customized semiconductor recipe, and a Ni foil plated with a Ni-63 radioisotope. The betavoltaic energy converter (BEC) includes an array of 16 parallel-connected betavoltaic cells. Experimental results demonstrate that the series and parallel connections of two BECs result in an open-circuit voltage $V_{oc}$ of 3.06 V with a short-circuit current $I_{sc}$ of 48.5 nA, and a $V_{oc}$ of 1.50 V with an $I_{sc}$ of 92.6 nA, respectively. The capacitor charging efficiency in terms of the current generated from the two series-connected BECs was measured to be approximately 90.7%.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.12 s.354
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• pp.65-73
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• 2006

This work presents a 14b 200KS/s $0.87mm^2$ 1.2mW 0.18um CMOS algorithmic A/D converter (ADC) for intelligent sensors control systems, battery-powered system applications simultaneously requiring high resolution, low power, and small area. The proposed algorithmic ADC not using a conventional sample-and-hold amplifier employs efficient switched-bias power-reduction techniques in analog circuits, a clock selective sampling-capacitor switching in the multiplying D/A converter, and ultra low-power on-chip current and voltage references to optimize sampling rate, resolution, power consumption, and chip area. The prototype ADC implemented in a 0.18um 1P6M CMOS process shows a measured DNL and INL of maximum 0.98LSB and 15.72LSB, respectively. The ADC demonstrates a maximum SNDR and SFDR of 54dB and 69dB, respectively, and a power consumption of 1.2mW at 200KS/s and 1.8V. The occupied active die area is $0.87mm^2$.

• Journal of the Korean Electrochemical Society
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• v.5 no.3
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• pp.117-124
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• 2002

Poly(acrylonitrile)(PAN) solutions in dimethylformamide(DMF) were electrospun to prepare webs consisting of 400nm ultra-fine fibers. The webs were oxidatively stabilized, activated by steam and resulted to be activated carbon fibers(ACFs). The specific surface area was $800\~1230 m^2/g$, which showed a trend of a decrease of the surface area with an increase in activation temperature, showing opposite behavior to the other ACFs. The activation energy of the stabilized fibers for the steam activation was determined as 29.2 kJ/mol to be relatively low indicating the easier activation than that of other carbonized fibers. The ACF webs were characterized by pore size and specific surface uea which would be related to the specific capacitance of the electrical double layer capacitor (EDLC). The specific capacitances measured were 27 F/g, 25 F/g, 22 F/g at the respective activation temperature of $700^{circ}C,\;750^{\circ}C\;800^{\circ}C$, showing similar trend with the specific surface area i.e., the higher activation temperature was, the lower specific capacitance resulted.

• Journal of the Korean Magnetics Society
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• v.17 no.3
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• pp.141-146
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• 2007

A new class of LC-resonator for micro magnetic sensor device was invented and fabricated by means of MEMS technique. The micro LC-resonator consists of a solenoidal micro-inductor with a bundle of soft magnetic microwire cores and a capacitor connected in parallel to the micro-inductor. The core magnetic material is a tiny glass coated $Co_{83.2}B_{3.3}Si_{5.9}Mn_{7.6}$ microwire fabricated by a glasscoated melt spinning technique. The core materials were annealed at various temperatures $150^{\circ}C,\;200^{\circ}C\;,250^{\circ}C\;,$ and $300^{\circ}C$ for 1 hour in a vacuum to improve soft magnetic properties. The solenoidal micro-inductors fabricated by MEMS technique were $500{\sim}1,000{\mu}m$ in length with $10{\sim}20$ turns. The changes of inductance as a function of external magnetic field in micro-inductors with properly annealed microwire cores were varied as much as 370%. Since the permeability of ultra soft magnetic microwire is changing rapidly as a function of external magnetic field. The inductance ratio as well as magnetoimpedance ratio (MIR) in a LC-resonator was varied drastically as a function of external magnetic field. The MIR curves can be tuned very precisely to obtain maximum sensitivity. A prototype magnetic sensor device consisting of the developed microinductors with a multivibrator circuit was test successfully.

• Journal of IKEEE
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• v.23 no.1
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• pp.14-21
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• 2019

In this paper, we implemented an on-board miniaturization antenna operating 2.4 GHz using MZR(Mu Zero Resonator). It is must be operating under the constraint that the size of the small terminal PCB should be $78{\times}38{\times}0.8mm^3$ and the size of the system should be $63{\times}38{\times}0.8mm^3$ and the size of the radiating part should be $15{\times}38{\times}0.8mm^3$. The feeding structure uses a CPW structure for stable feeding and a feeding point at the upper left of the system board. A magnetic field coupling structure is used for coupling the feeding part and the antenna. The resonance frequency of the MZR is determined by the series inductance and capacitance of the cell, so the gap between the cells, the length of the cell, the length of the interdigital capacitor, and the spacing between the radiation part and the ground plane are analyzed. The antenna was designed and fabricated using the results. The total size of the antenna including the feed structure is $20.8{\times}9.0{\times}0.8mm^3$, and the electrical length is $0.1664{\lambda}_0{\times}0.072{\lambda}_0{\times}0.0064{\lambda}_0$. The measurement result for 10 dB bandwidth, gain and directivity are 440 MHz(18.3%), 0.4405 dB, and 2.722 dB respectively. It is confirmed that the radiation pattern has omnidirectional characteristics and it can be applied to ultra small terminal antenna.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.11 s.353
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• pp.48-57
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• 2006

This work describes a 12b 200KHz 0.52mA $0.47mm^2$ algorithmic ADC for sensor applications such as motor controls, 3-phase power controls, and CMOS image sensors simultaneously requiring ultra-low power and small size. The proposed ADC is based on the conventional algorithmic architecture with recycling techniques to optimize sampling rate, resolution, chip area, and power consumption. The input SHA with eight input channels for high integration employs a folded-cascode architecture to achieve a required DC gain and a sufficient phase margin. A signal insensitive 3-D fully symmetrical layout with critical signal lines shielded reduces the capacitor and device mismatch of the MDAC. The improved switched bias power-reduction techniques reduce the power consumption of analog amplifiers. Current and voltage references are integrated on the chip with optional off-chip voltage references for low glitch noise. The employed down-sampling clock signal selects the sampling rate of 200KS/s or 10KS/s with a reduced power depending on applications. The prototype ADC in a 0.18um n-well 1P6M CMOS technology demonstrates the measured DNL and INL within 0.76LSB and 2.47LSB. The ADC shows a maximum SNDR and SFDR of 55dB and 70dB at all sampling frequencies up to 200KS/s, respectively. The active die area is $0.47mm^2$ and the chip consumes 0.94mW at 200KS/s and 0.63mW at 10KS/s at a 1.8V supply.