• 한국통신학회논문지
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• 제22권6호
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• pp.1148-1159
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• 1997

In the broadband integrated service digital networks (B-ISDN), ATM switches hould be abld to accommodate diverse types of applications ith different traffic characteristics and quality ddo services (QOS). Thus, in order to increase the utilization of switches and satisfy the QOS's of each traffic type, some types of priority control schemes are needed in ATM switches. In this paper, a nonblocking input and output queueing ATm switch with capacity C is considered in which two classes of traffics with different loss probability constraints are admitted. 'Partial push-out' algorithm is suggested as a loss priority control schemes, and the performance of this algorithm is analyzed when this is adopted in input buffers of the switch. The quque length distribution of input buffers and loss probabilities of each traffic are obtained using a matrix-geometric solution method. Numerical analysis and simulation indicate that the utilization of the switch with partial push-out algorithm satisfying the QOS's of each traffic is much higher than that of the switch without control. Also, the required buffer size is reduced while satisfying the same QOS's.

• Transactions on Electrical and Electronic Materials
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• 제14권3호
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• pp.116-120
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• 2013

This paper proposes a novel RF MEMS dc-contact switch with stiff membrane on a quartz substrate. The uniqueness of this work lies in the utilization of a seesaw mechanism to restore the movable part to its rest position. The switching action is done by using separate pull-down and pull-up electrodes, and hence operation of the switch does not rely on the elastic recovery force of the membrane. One of the main problems faced by electrostatically actuated MEMS switches is the high operational voltages, which results from bending of the membrane, due to internal stress gradient. This is resolved by using a stiff and thick membrane. This membrane consists of flexible meanders, for easy movement between the two states. The device operates with an actuation voltage of 6.43 V, an insertion loss of -0.047 dB and isolation of -51.82 dB at 2 GHz.

• 전자공학회논문지S
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• 제36S권2호
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• pp.131-137
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• 1999

본 논문에서는 주 스위치가 항상 영전압에서 스위칭하는 새로운 영전압 스위칭 방식의 컨버터를 제안하였다. 기존의 영전압 PWM 컨버터의 공진 인덕터와 포화인덕터은 보조 스위치의 전도손실을 줄이기 위하여 두 개의 포화 인덕터로 대체되었다. 따라서, 제안된 컨버터는 주 스위치가 영전압 스위칭되어 스위칭 손실이 적으며, 주 스위치와 보조 스위치의 전도손실을 줄인 특징이 있다. 주 스위치의 영전압 스위칭 특징을 포함한 특징은 200 kHz에서 실행하여 그 결과를 입증하였다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1997년도 하계학술대회 논문집 E
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• pp.1816-1818
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• 1997

A triggered sparkp gap switch was fabricater and its high-voltage discharge characteristics were studied. The switch is composed of two main electrodes and one trigger electrode which is placed perpendicular to the main one. Spark gap distance was fixed by 25 mm. This device has been operated without self firing at the pulse repetition frequency from 1 to 20 Hz limited by the charging current, and the hold-off voltage from 10 to 30kV. An IGBT switch and igniter coil (originally used in a car) were adopted for a trigger circuit. In this article preliminary switch characteristics of the spark gap switch are reported with the emphasis on the description of the trigger circuit.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2000년도 ITC-CSCC -1
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• pp.537-540
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• 2000

In this paper, we propose and design new architecture of the modified Banyan switch for a high speed networking and the high speed parallel computer. The proposed switching network with a remodeled architecture is a newly modified Banyan network with eight input and output ports. The switch scheme is that two packets may arrive on different inputs destined for the same output. We have analyzed the maximum throughput of the revised switch. The result of the analyses shows good agreement simulation and if we adopt such architecture of the revised model of the Banyan switch, the hardware complexity can be reduced. The FIFO discipline has increased about lloio when we compare the switching system with the input buffer system. We have designed and verified the switching system in VHDL.

• 전기학회논문지
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• 제58권5호
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• pp.950-959
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• 2009

In this paper, a dc link voltage variable inverter system is proposed, which consists of a two-switch buck-boost converter and a four-switch inverter. In addition, as the current and torque ripples are generated by a voltage difference between back EMF and dc link voltage, these ripples could be reduced according to the controlled dc-link voltage according to the motor speed. The validity of the proposed inverter is verified by informative simulation and experimental results.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2012년도 전력전자학술대회 논문집
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• pp.230-231
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• 2012

This paper describes a gate driver that operates numerous semiconductor switch in the solide-state pulsed power modulator. the proposed gate driver is designed to receive both the isolated drive-power and the on/off pulse signals through the transformer. Moreover, the IGBT-switch can be quickly turned off by adding protection circuit. Therefore it protects the IGBT-switch from the arc condition that frequently occurs in high-voltage pulse application. To comprehend operating characteristic of each IGBT-switch in pulse output condition, the device consisting of a high efficiency soft-switching capacitor charger and two series stacking IGBT-switch is developed. Finally, the relability of the proposed gate driver and the device for its test are proved through PSpice simulation and experiments.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2000년도 추계종합학술대회 논문집(1)
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• pp.267-270
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• 2000

In this paper, we consider the simple redundant structures with the function of hardware based active/standby control. The system includes two switch modules. The switch module is connected to a data bus, but only the active switch module has control of the data bus. The standby unit takes over the function of the active unit when the active unit failure or mode command are asserted. And this paper illustrate the high-speed router system and the overall redundant system architecture. The proposed redundant architecture for 80G Router system is verified and implemented with experiment.

• Communications for Statistical Applications and Methods
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• 제7권2호
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• pp.525-531
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• 2000

Bayes estimators for reliability of a two-unit hot standby system with the imperfect switch based upon a complete sample of failure times observed from exponential distributions under squared error loss and some priors for failure rates are proposed, and mean squared errors of proposed several Bayes estimators for the system reliability are compared unmerically each other through the Monte Carlo simulation.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2001년도 하계종합학술대회 논문집(1)
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• pp.281-284
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• 2001

In this paper, we design the Sorting-Banyan network with an efficient buffer and sorting management schema that makes switch be capable of supporting delay sensitive as well as loss sensitive. The proposed switching network is remodeled that based on Batcher-banyan network that have eight input and output ports The structure of designed switching network is constructed of modified banyan network with 2-way routing paths and two plane sorting networks. we have analysed the maximum throughput of the switch, under the uniform random traffic load, the FIFO discipline has increased by about 11% when we compare the switching system with the input buffering system.