• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• v.9 no.2
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• pp.881-883
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• 2005

In case is below length 100nm of gate, various kinds problem can be happened with by threshold voltage change of device, occurrence of leakage current by tunneling because thickness of oxide by 1.5nm low scaling is done and doping concentration is increased. SiO$_2$ dielectric substance can not be used for gate insulator because is expected that tunneling current become 1A/cm$^2$ in 1.5nm thickness low. In this paper, devised double gate MOSFET(DGMOSFET) to decrease effect of leakage current by this tunneling. Therefore, could decrease effect of these leakage current in thickness 1nm low of SiO$_2$ dielectric substance. But, very big gate insulator of permittivity should be developed for develop device of nano scale.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.8 no.3
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• pp.411-418
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• 1998

The thickness dependence of stress electric filed oxide currents has been measured in oxides with thicknesses between 10 nm and 80 nm. The oxide currents were shown to be composed of stress current and transient current. The stress current was composed of stress induced leakage current and dc current. The stress current was caused by trap assisted tunneling through the oxide. The transient current was caused by the tunneling charging and discharging of the trap in the interfaces. The stress current was used to estimate to the limitations on oxide thicknesses. The transient current was used to the data retention in memory devices.

• JSTS:Journal of Semiconductor Technology and Science
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• v.17 no.2
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• pp.271-276
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• 2017

The triple-gate tunnel FETs encapsulated with an epitaxial layer (EL TFETs) is proposed to lower the subthreshold swing of the TFETs. Furthermore, the band-to-band tunneling based on the maximum electric-field can occur thanks to the epitaxial layer wrapping the Si fin. The performance and mechanism of the EL TFETs are compared with the previously proposed TFET based on simulation.

• Proceedings of the KIEE Conference
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• 1995.11a
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• pp.558-560
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• 1995

Tunneling current from filed emission display tips is calculated by numerical analysis using a finite element method software. For simple tip structures it is shown that the image charge method could provide an efficient way to estimate the tunneling current.

• 한국초전도학회:학술대회논문집
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• v.13
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• pp.28-28
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• 2003

• Proceedings of the Korean Vacuum Society Conference
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• 2012.02a
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• pp.344-345
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• 2012

The Gate-Induced-Drain-Leakage (GIDL) current with channel doping and width dependence are characterized. The GIDL currents are found to increase in MOSFETs with higher channel doping levels and the observed GIDL current is generated by the band-to-band-tunneling (BTBT) of electron through the reverse-biased channel-to-drain p-n junction. A BTBT model is used to fit the measured GIDL currents under different channel-doping levels. Good agreement is obtained between the modeled results and experimental data. The increase of the GIDL current at narrower widths in mainly caused by the stronger gate field at the edge of the shallow trench isolation (STI). As channel width decreases, a larger portion of the GIDL current is generated at the channel-isolation edge. Therefore, the stronger gate field at the channel-isolation edge causes the total unit-width GIDL current to increases for narrow-width devices.

• Journal of Electrical Engineering and Technology
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• v.8 no.6
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• pp.1481-1486
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• 2013

In this paper, a new two dimensional (2D) analytical model of a Dual Material Gate tunnel field effect transistor (DMG TFET) is presented. The parabolic approximation technique is used to solve the 2-D Poisson equation with suitable boundary conditions. The simple and accurate analytical expressions for surface potential and electric field are derived. The electric field distribution can be used to calculate the tunneling generation rate and numerically extract tunneling current. The results show a significant improvement of on-current and reduction in short channel effects. Effectiveness of the proposed method has been confirmed by comparing the analytical results with the TCAD simulation results.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.34D no.4
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• pp.27-32
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• 1997

In resonant tunneling diodes with the quantum well structure showing the negative differential resistance (NDR), it is essential to increase both the peak-to-valley current ratio (PVCR) and the peak current desnity ( $J_{p}$) for the accurate digital switching operation and the high output of the device. In this work, a resonant interband tunneling diode (RITD) with single quantum well structure, which is composed of I $n_{0.47}$As/I $n_{0.52}$A $l_{0.48}$As heterojunction on the InP substrate, is fabricated ot improve PVCR and JP, and then the dependence of I-V charcteristics on the width of the quantum well was investigated.d.ted.d.

• Proceedings of the KIEE Conference
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• 1996.07c
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• pp.1456-1458
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• 1996

In resonant tunneling diodes with the quantum well structure showing the negative differential resistance (NDR), it is essential to increase both the peak-to-valley current ratio (PVCR) and the peak current density ($J_p$) for the accurate switching operation and the high output of the device. In this work, a resonant interband tunneling diode (RITD) with single quantum well structure, which is composed of $In_{0.53}Ga_{0.47}As/ln_{0.52}Al_{0.48}As$ heterojunction on the InP substrate, is suggested to improve the PVCR and $J_p$ through the narrowed tunnel barriers. As the result, the measured I-V curves showed the PVCR over 60.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2016.05a
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• pp.450-452
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• 2016

The effect of channel doping on L-shaped Tunneling Field-Effect Transistors (TFETs) have been investigated by 2D TCAD simulation. When the source doping is over $10^{20}cm^{-3}$, the subthreshold swing (SS) is abruptly decreased, and when drain doping concentration is below $10^{18}cm^{-3}$, the leakage current in the negative voltage is reduced.