• Proceedings of the IEEK Conference
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• 2000.06b
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• pp.64-67
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• 2000

Tungsten silicide(WSi$_2$) is proposed for the alternate gate electrode of ULSI MOS devices. Good structural property and low resistivity of WSi$_2$ deposited by a low pressure chemical vapor deposition(LPCVD) method directly on SiO$_2$ is obtained after annealing. Especially, WSi$_2$-SiO2 interface remains flat after annealing tungsten silicide at high temperature. Electrical characteristics of annealed WSi$_2$-SiO$_2$-Si(MOS) capacitors were improved in view of charge trapping.

• Journal of the Korean institute of surface engineering
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• v.27 no.2
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• pp.83-90
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• 1994

We have investigated the mechanism for the abnormal oxide growth occuring during oxidation of the crystalline tungsten silicide. TEM and XPS analysis reveal the abnormaly grown oxide layer consisting of crystalline $Wo_3$ and amorphous $SiO_2$. The presence of crystalline $Wo_3$ provides a rapid diffusion of oxygen through the oxide layer. The abnormal oxide growth is mainly due to the poor quality of initial oxide layer growth on tungsten silicide. Two species such as tungsten and silicon from decomposition fo tungsten silicide as well as silicon supplied from the underlying polysilicon are the main contributors sto abnormal oxide forma-tion. Consequently, the abnormal oxidation results in the disintegration of tungsten silicide and thinning of polysilicon as well.

• Journal of the Korean Ceramic Society
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• v.27 no.5
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• pp.645-651
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• 1990

Effects of excess Si on the properities of the oxide of CVD tungsten silicide were investigated by comparing the characteristics of the two kinds of thermal oxide for CVD-WSi2.7 and WSi3.1 films on the polycrystalline Si film each other. It is reveraled from AES analysis that Si in the surface region of the silicide film is consumed to make composition and resistivity of the silicide film very nonuniform for the case of the oxidation of WSi3.1, while the underlayer polycrystalline Si was consumed for the case of the oxidation of WSi2.7.

• Mass Spectrometry Letters
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• v.3 no.1
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• pp.18-20
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• 2012

We report observation of laser desorption/ionization (LDI) of peptides from flat surfaces of tungsten silicide ($WSi_2$). In contrast to MALDI (matrix-assisted laser desorption/ionization) and SALDI (surface-assisted laser desorption/ionization) mass spectrometry, this study did not utilize any matrices and surface nanostructures. In this work, LDI on $WSi_2$ surfaces is demonstrated to cover a mass range up to 1,600 Da (somatostatin; monoisotopic mass = 1637.9 Da). In addition, it exhibited a high sensitivity, which could detect peptides, which could detect peptides of low femtomole levels (20 fmol for angiotensin II). The observed LDI process was discussed to be largely thermal, more specifically, due to laser-induced surface heating that is most likely promoted by the low thermal diffusivity (${\kappa}$) of $WSi_2$ substrate.

• Proceedings of the Materials Research Society of Korea Conference
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• 1993.05a
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• pp.22-22
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• 1993

Tungsten silicide는 낮은 전도도, 높은 녹는점, pattern 형성에 용이함등으로 VLSI device Interconnect(Bit line)로 활발하게 이용되고 있다. 일반적으로 Tungsten silicide 는 polycide(WSi$_2$/poly-Si)구조로 사용이 되며, polycide 구조는 산화분위기에서 WSi$_2$위에 SiO$_2$막을 쉽게 형성시키는 장점이 있다. As-dep상태의 polycide를 산화시킬적에는 텅스텐 실리사이드에 존재하는 excess-silicon과 microcrystalline 구조 (grain size=3$\AA$)로 인하여 텅스텐 실리사이드 표면에 균일한 SiO$_2$가 형성이 된다. 그러나 post-anneal을 실시한 샘플 Furnace anneal ($N_2$:O$_2$유량비=2:1) 처리하면 성장된 텅스텐 실사이드 입자의 입계효과에 의하여 텅스텐 실리사이드의 표면에 SiO$_2$뿐만 아니라 WO$_3$가 형성되는 이상산화가 발생되어 공정의 어려움을 야기시키고 있다. 본 실험에서는 post anneal ($700^{\circ}C$, 30min, $N_2$ 분위기) 시킨 시편을 Implantation(As 또는 phosphorous)을 실시하여 실리사이드 표면을 비정질화 시킨후 Furnace anneal 실시하여 이상산화 발생 억제에 I/I처리가 미치는 효과를 관찰하였다. XPS를 이용하여 이상산화막 두께와 WO$_3$존재를 조사하였고, AES를 사용하여 W, Si, O 원소들이 깊이에 따라 변하는 것을 관찰하였다.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.52 no.4
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• pp.173-178
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• 2003

In this paper, we studied the physical and electrical characteristics of $\textrm{WSi}_{x}$ thin film with respect to the adoption of the DCS (dichlorosiliane) post flow and the variation of deposition temperature. XRD measurements show that as deposited thin film has a hexagonal structure regardless of deposition Process. However, we find that the phase of thin film has changed to a tetragonal structure after the heat treatment at $680^{\circ}C$. Adoption of DCS post flow and increment of deposition temperature result in the increments of Si/W composition ratio. These conditions also result in the increment of sheet resistance by the amount 3.0~4.2$\Omega$/$\square$, but give the tendency in the decrement of stress by 0.27~0.3 E10dyne/$\textrm{cm}^2$. We also find that the contact resistance of word line and bit line interconnection was decreased by the amount 5.33~16.43$\mu$$\Omega$-$\textrm{cm}^2$, when applying DCS post flow and increasing deposition temperature.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.07a
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• pp.832-835
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• 2001

We report the structural and electrical properties of hafnium oxide (HfO$_2$) films with tungsten silicide (WSi$_2$) metal gate. In this study, HfO$_2$thin films were fabricated by oxidation of sputtered Hf metal films on Si, and WSi$_2$was deposited directly on HfO$_2$by LPCVD. The hysteresis windows in C-V curves of the WSi$_2$HfO$_2$/Si MOS capacitors were negligible (<20 mV), and had no dependence on frequency from 10 kHz to 1 MHz and bias ramp rate from 10 mV to 1 V. In addition, leakage current was very low in the range of 10$^{-9}$ ~10$^{-10}$ A to ~ 1 V, which was due to the formation of interfacial hafnium silicate layer between HfO$_2$and Si. After PMA (post metallization annealing) of the WSi$_2$/HfO$_2$/Si MOS capacitors at 500 $^{\circ}C$ EOT (equivalent oxide thickness) was reduced from 26 to 22 $\AA$ and the leakage current was reduced by approximately one order as compared to that measured before annealing. These results indicate that the effect of fluorine diffusion is negligible and annealing minimizes the etching damage.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1988.05a
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• pp.52-55
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• 1988

Tunsten silicide (WSix) films on polycrystalline silicon were formed by low-pressure chemical vapor deposition (LPCVD) and were annealed in $N_2$ for 30 mins at various temperatures. The annealing behaviors of tungsten silicide films have been investigated by electrical resistivity measurements, X-ray diffraction methods, scanning electron microscopy (SEM) and Hall measurements. The electrical resistivity decreased almost linearly with increasing annealing temperature and reached $35{\mu}{\Omega}-cm$ at $1000^{\circ}C$ annealing. The X-ray and SEM analyses indicate that crystallization of $WSi_2$ and grain growth occurs when annealed above $1000^{\circ}C$. Excess silicon redistribution occurs considerably when annealed above $1000^{\circ}C$. By Hall measurements, the carrier type for specimens annealed at $1000^{\circ}C$ was found to be positive holes, while the carriers were electrons in the specimens that were annealed at $800^{\circ}C$.