• Title/Summary/Keyword: Tungsten silicide

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Rapid Surface Heating Promotes Laser Desorption Ionization of Thermally Labile Molecules from Surfaces

  • Han, Sang Yun
    • Mass Spectrometry Letters
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    • v.7 no.4
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    • pp.91-95
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    • 2016
  • In recent years, matrix-free laser desorption ionization (LDI) for mass spectrometry of thermally labile molecules has been an important research subject in the pursuit of new ionization methods to serve as alternatives to the conventional matrix-assisted laser desorption ionization (MALDI) method. While many recent studies have reported successful LDI of thermally labile molecules from various surfaces, mostly from surfaces with nanostructures, understanding of what drives the LDI process still requires further study. This article briefly reviews the thermal aspects involved in the LDI mechanism, which can be characterized as rapid surface heating. The thermal mechanism was supported by observed LDI and postsource decay (PSD) of peptide ions produced from flat surfaces with special thermal properties including amorphous Si (a-Si) and tungsten silicide ($WSi_x$). In addition, the concept of rapid surface heating further suggests a practical strategy for the preparation of LDI sample plates, which allows us to choose various surface materials including crystalline Si (c-Si) and Au tailorable to specific applications.

Electrical Properties of Annealed $WSi_{x}$ Films Deposited on P+ Polysilicon by LPCVD (P+ Polysilicon층 위에 저압화학증착된 $WSi_{x}$ 박막의 열처리에 따른 전기적 특성)

  • 이희승;임호빈;이종무
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 1990.10a
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    • pp.81-85
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    • 1990
  • $WSi_{x}$ film deposited on p+ polysilicon by low pressure chemical vapor deposition method were annealed by rapid thermal process, their properties have been investigated by measurements of electrical resistivity and Hall voltage and by analyses of phases and microstructure using X-ray diffraction and SEM technique. The electrical resistivity of the polycides consisting of the tungsten silicide and the p+ polysilicon decreases with the increase in annealing temperature due probably to the increase in grain size. unlike the polycides consisting of the $WSi_{x}$ and n+ polysilicon, however, the Hall voltage of the polycides consisting of $WSi_{x}$ and p+ polysilicon were positive for all specimens annealed as well as the as-deposited one, indicating the majority carrier in $WSi_{x}$. is hole and is independent of the annealing.

A Study on the Properties of WS $i_{x}$ Thin Film with Formation Conditions of Polycide (폴리사이드 형성 조건에 따른 WS $i_{x}$ 박막 특성에 관한 연구)

  • 정양희;강성준;김경원
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.52 no.9
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    • pp.371-377
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    • 2003
  • We perform the physical analysis such that Si/W composition ratios and phosphorus distribution change in the W/S $i_{x}$ thin films according to phosphorus concentration of polysilicon and W $F_{6}$ flow rate for the formation of WS $i_{x}$ polycide used as a gate electrode. We report that these physical characteristics have effects on the contact resistance between word line and bit line in DRAM devices. RBS measurements show that for the samples having phosphorus concentrations of 4.75 and 6.0${\times}$10$^{2-}$ atoms/㎤ in polysilicon, by applying W $F_{6}$ flow rates decreases from 4.5 to 3.5 sccm, Si/W composition ratio has increases to 2.05∼2.24 and 2.01∼2.19, respectively. SIMS analysis give that phosphorus concentration of polysilicon for both samples have decreases after annealing, but phosphorus concentration of WS $i_{x}$ thin film has increases by applying W $F_{6}$ flow rates decreases from 4.5 to 3.5 sccm. The contact resistance between word line and bit line in the sample with phosphorus concentration of 6.0 ${\times}$ 10$^{20}$ atoms/㎤ in polysilicon is lower than the sample with 4.75 ${\times}$ 10$^{20}$ atoms/㎤ After applying W $F_{6}$ flow rates decreases from 4.5 to 3.5 sccm, the contact resistance has been improved dramatically from 10.1 to 2.3 $\mu$ $\Omega$-$\textrm{cm}^2$.

Influence of DCS Post flow on the Properties of $\textrm{WSi}_{x}$ Thin films (DCS Post Flow가 $\textrm{WSi}_{x}$ 박막 특성에 미치는 영향)

  • 전양희;강성준;강희순
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.52 no.4
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    • pp.173-178
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    • 2003
  • In this paper, we studied the physical and electrical characteristics of $\textrm{WSi}_{x}$ thin film with respect to the adoption of the DCS (dichlorosiliane) post flow and the variation of deposition temperature. XRD measurements show that as deposited thin film has a hexagonal structure regardless of deposition Process. However, we find that the phase of thin film has changed to a tetragonal structure after the heat treatment at $680^{\circ}C$. Adoption of DCS post flow and increment of deposition temperature result in the increments of Si/W composition ratio. These conditions also result in the increment of sheet resistance by the amount 3.0~4.2$\Omega$/$\square$, but give the tendency in the decrement of stress by 0.27~0.3 E10dyne/$\textrm{cm}^2$. We also find that the contact resistance of word line and bit line interconnection was decreased by the amount 5.33~16.43$\mu$$\Omega$-$\textrm{cm}^2$, when applying DCS post flow and increasing deposition temperature.

Formation of Tungsten Silicide Gate Electrode on Quartz (석영 기판 위에서 텅스텐 실리사이드 게이트 전극 형성에 관한 연구)

  • O, Sang-Hyeon;Kim, Ji-Yong;Kim, Ji-Yeong;Lee, Jae-Gap;Im, In-Gon;Kim, Geun-Ho
    • Korean Journal of Materials Research
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    • v.8 no.1
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    • pp.80-84
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    • 1998
  • 본 연구에서는 석영을 기판으로 사용하여 텅스텐 실리사이드 게이트를 고온에서 결정화시키고, 이\ulcorner 발생되는 crack 에 대한 생성원인을 조사하였다. 증착된 텅스텐실리사이드의 실리콘 조성과 실리콘 완층충의 두께가 증가함에 따라 열응력이 감소하는 경향이 관찰되었으며, 과잉의 실리콘 조성을 가진 실리사이드를 열처리한 경우에는 crack에 대한 저항이 증가함을 알 수 있었다. 그러나 실리콘 완충층을 사용한 경우는 두께가 증가함에 따라 열응력이 감소하는 경향이 있으나, crack이 보다 쉽게 발생되는 결과를 얻었다. 이는 실리사이드 반응에 의하여 거칠어진 계면에 응력이 집중되어 crack생성을 쉽게하는 것으로 여겨진다. 결과적으로 석영과 텅스텐실리사이드의 열\ulcorner창계수차이에 의하여 생성되는 열응력이 crack생성의 주원인으로 작용하고, 실리콘 완층층을 사용한 구조하에서는 계면에서 일어나는 실리사이드반응이 crack생성에 큰 영향을 미치는 것으로 생각된다.

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Investigation of $WSi_2$ Gate for the Integration With $HfO_3$gate oxide for MOS Devices (MOS 소자를 위한 $HfO_3$게이트 절연체와 $WSi_2$게이트의 집적화 연구)

  • 노관종;양성우;강혁수;노용한
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2001.07a
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    • pp.832-835
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    • 2001
  • We report the structural and electrical properties of hafnium oxide (HfO$_2$) films with tungsten silicide (WSi$_2$) metal gate. In this study, HfO$_2$thin films were fabricated by oxidation of sputtered Hf metal films on Si, and WSi$_2$was deposited directly on HfO$_2$by LPCVD. The hysteresis windows in C-V curves of the WSi$_2$HfO$_2$/Si MOS capacitors were negligible (<20 mV), and had no dependence on frequency from 10 kHz to 1 MHz and bias ramp rate from 10 mV to 1 V. In addition, leakage current was very low in the range of 10$^{-9}$ ~10$^{-10}$ A to ~ 1 V, which was due to the formation of interfacial hafnium silicate layer between HfO$_2$and Si. After PMA (post metallization annealing) of the WSi$_2$/HfO$_2$/Si MOS capacitors at 500 $^{\circ}C$ EOT (equivalent oxide thickness) was reduced from 26 to 22 $\AA$ and the leakage current was reduced by approximately one order as compared to that measured before annealing. These results indicate that the effect of fluorine diffusion is negligible and annealing minimizes the etching damage.

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