• ETRI Journal
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• 제43권6호
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• pp.1113-1129
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• 2021

Lightweight ciphers are increasingly employed in cryptography because of the high demand for secure data transmission in wireless sensor network, embedded devices, and Internet of Things. The PRESENT algorithm as an ultralightweight block cipher provides better solution for secure hardware cryptography with low power consumption and minimum resource. This study generates the key using key rotation and substitution method, which contains key rotation, key switching, and binary-coded decimal-based key generation used in image encryption. The key rotation and substitution-based PRESENT architecture is proposed to increase security level for data stream and randomness in cipher through providing high resistance to attacks. Lookup table is used to design the key scheduling module, thus reducing the area of architecture. Field-programmable gate array (FPGA) performances are evaluated for the proposed and conventional methods. In Virtex 6 device, the proposed key rotation and substitution PRESENT architecture occupied 72 lookup tables, 65 flip flops, and 35 slices which are comparably less to the existing architecture.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2016년도 제50회 동계 정기학술대회 초록집
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• pp.307.2-307.2
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• 2016

In this study, we synthesized Au nanoparticles (AuNPs) in polyacrylonitrile (PAN) thin films using a simple annealing process in the solid phase. The synthetic conditions were systematically controlled and optimized by varying the concentration of the Au salt solution and the annealing temperature. X-ray photoelectron spectroscopy (XPS) confirmed their chemical state, and transmission electron microscopy (TEM) verified the successful synthesis, size, and density of AuNPs. Au nanoparticles were generated from the thermal decomposition of the Au salt and stabilized during the cyclization of the PAN matrix. For actual device applications, previous synthetic techniques have required the synthesis of AuNPs in a liquid phase and an additional process to form the thin film layer, such as spin-coating, dip-coating, Langmuir-Blodgett, or high vacuum deposition. In contrast, our one-step synthesis could produce gold nanoparticles from the Au salt contained in a solid matrix with an easy heat treatment. The PAN:AuNPs composite was used as the charge trap layer of an organic nano-floating gate memory (ONFGM). The memory devices exhibited a high on/off ratio (over $10^6$), large hysteresis windows (76.7 V), and a stable endurance performance (>3000 cycles), indicating that our stabilized PAN:AuNPs composite film is a potential charge trap medium for next generation organic nano-floating gate memory transistors.

• 전자공학회논문지A
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• 제28A권9호
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• pp.700-707
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• 1991

Transmission line crosstalk of a printed circuit baord terminated with the linear resistive and nonlinear terminal network is analyzed. Based on a quasi-static approximation, crosstalk voltage is computed in frequency domain by applying the modal analysis. A scheme to calculate the maximum crosstalk voltage for a line terminated with the nonlinear digital gate is proposed. And also, crosstalk quantities are numerically obtained for the microstrip and strip line, and compared with the experimental data to validate relevance of this method.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2005년도 추계종합학술대회
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• pp.805-808
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• 2005

In this study, the design of advanced LVDS(Low Voltage Differential Signaling) I/O interface circuit with new structural low triggering ESD(Electro-Static Discharge) protection circuit was investigated. Due to the differential transmission technique and low power consumption at same time. maximum transmission data ratio of designed LVDS transmitter was simulated to 5Gbps, Also, the LIGCSCR(Latch-up Immune Gate Coupled SCR)was designed. It consists of PLVTSCR (P-type Low Voltage Trigger SCR), control NMOS and RC network. The triggering voltage was simulated to 3.6V. And the latch-up characteristics were improved. Finally, we performed the layout high speed I/O interlace circuit with the low triggered ESD protection device in one-chip.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2001년도 Proceedings ICPE 01 2001 International Conference on Power Electronics
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• pp.718-722
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• 2001

This paper proposes an SSSC based on multi-bridge inverters in PWM scheme. The proposed system consists of 6 H-bridge inverter modules per phase. The dynamic characteristic of proposed system was analyzed by simulation with EMTP codes, assuming that the SSSC is inserted in the 154-kV transmission line of one-machine-infinite-bus power system. The feasibility of hardware implementation was verified through experimental works with a scaled-model. The proposed system can be directly inserted in the transmission line without coupling transformers, and has flexibility in expanding the operation voltage by increasing the number of H-bridges.

• 한국농공학회:학술대회논문집
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• 한국농공학회 2005년도 학술발표논문집
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• pp.85-90
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• 2005

A Water Level gauge which composes a water supply system for water demand, information transmission system and the solar storehouse electromotive floodgate, regarding the structure plan and a production of the nothing power automatic floodgate it described. The important point must solve but urgently will compare the water amount used from system establishment place or not one. and It must give proof the efficient characteristic of system, must solve the technical problem portion against revision of the accuracy of upper downstream canal which is information transmission system of the Self-controlled check gate. The solar floodgate is more economic with the base which will reach and the system construction which is accurate.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2003년도 통신소사이어티 추계학술대회논문집
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• pp.281-284
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• 2003

Multi-code CDMA is an appropriate scheme for transmitting high rate data. However, dynamic range of the signal is large, and power amplifier with good linearity is required. Code select CDMA (CS/CDMA) is a variation of multi-code CDMA scheme that ensures constant amplitude transmission. In CS/CDMA input data selects multiple orthogonal codes, and sum of these selected codes are MPSK modulated to convert multi-level symbol into different carrier phases. CS/CDMA system employs level clipping to limit the number of levels at the output symbol to avoid hish density of signal constellation. In our previous work we showed that by encoding input data of CS/CDMA amplitude of the output symbol can be made constant. With this coding scheme, level clipping is not necessary and the output signal can be BPSK modulated for transmission. In this paper we show that the constant amplitude coded(CA-) CS/CDMA transmitter can be implemented using only logic gates, and the hardware complexity is very low. In the proposed transmitter architecture there is no apparent redundant encoder block which plays a major role in the constant amplitude coded CS/CDMA.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1995년도 하계학술대회 논문집 B
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• pp.931-933
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• 1995

In this paper, we develop protype of wierless recognition system using low frequency. Application of this system is very broad. Namely, High-way toll gate, animal management, parking system and industral automation et al. This system is composed of controller, decoder and tag. Controller is personal PC, decoder is signal module and tag is mobile corresponder module. Modulation is ASK, 4,800bps, frequency is 120/60kHz and transmission length is about 80cm. And now we study improvement of stability, low power consumption, compact of tag and transmission length improvement.

• 전기전자학회논문지
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• 제21권3호
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• pp.256-259
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• 2017

SENT(single edge nibble transmission)는 차량에 탑재되는 다양한 센서와 ECU(electronic control unit)간의 직렬 통신 프로토콜이다. SENT는 디지털 파형을 사용하기 때문에 트랜시버 회로가 필요 없고 구조가 간단하며 가격이 저렴하여 주로 센서 내장형 통신 인터페이스로 주로 사용된다. 본 논문에서는 Verilog HDL을 이용하여 SAE J2716 규격을 만족하는 SENT 인터페이스를 설계하였다. 또한 이를 FPGA로 구현하고 테스트 보드를 제작하여 동작을 확인하였다. 0.18um 공정으로 합성하였을 때의 게이트 수는 약 2,500 게이트이다.

• 한국전기전자재료학회논문지
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• 제32권4호
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• pp.272-275
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• 2019

We investigated the electrical characteristics of amorphous silicon-zinc-tin-oxide (a-SZTO) thin films deposited by RF-magnetron sputtering at room temperature depending on the deposition time. We fabricated a thin film transistor (TFT) with a bottom gate structure and various channel thicknesses. With increasing channel thickness, the threshold voltage shifted negatively from -0.44 V to -2.18 V, the on current ($I_{on}$) and field effect mobility (${\mu}_{FE}$) increased because of increasing carrier concentration. The a-SZTO film was fabricated and analyzed in terms of the contact resistance and channel resistance. In this study, the transmission line method (TLM) was adopted and investigated. With increasing channel thickness, the contact resistance and sheet resistance both decreased.