• 제목/요약/키워드: Transmission Gate

검색결과 187건 처리시간 0.04초

Design of Digital Block for LF Antenna Driver (LF 안테나 구동기의 디지털 블록 설계)

  • Sonh, Seung-Il
    • Journal of the Korea Institute of Information and Communication Engineering
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    • 제15권9호
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    • pp.1985-1992
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    • 2011
  • PE(Passive Entry) is an automotive technology which allows a driver to lock and unlock door of vehicle without using smart key buttons personally. PG(Pssive Go) is an automotive technology which offers the ability to start and stop the engine when there is a driver in vehicle with smart key. When these two functions are unified, we call it PEG(Passive Entry/Go). LF(Low Frequency) antenna driver which is one of core technologies in PEG is composed of a digital part which processes commands and an analog part which generates sine waveform. The digital part of antenna driver receives commands from MCU(or ECU), and processes requested commands by MCU, and stores antenna-related driver commands and data on an internal FIFO block. The digital part takes corresponding actions for commands read from FIFO and then transfers modulated LF data to analog part. The analog part generates sine waveform and transmits outside through antenna. The designed digital part for LF antenna driver can acomplish faster LF data transmission than that of conventional product. LF antenna driver can be applicable to the areas such as PEG for automotive and gate opening and closing of building.

A fully integrated downconverter MMIC for millimeter wave applications (밀리미터파 응용을 위한 완전집적 다운컨버터 MMIC)

  • Jeon, Jang-Hyeon;Yun, Young
    • Journal of Advanced Marine Engineering and Technology
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    • 제37권1호
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    • pp.99-104
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    • 2013
  • In this paper, we developed a fully integrated downconverter MMIC (monolithic microwave integrated circuit) including Lange coupler and output active balun for millimeter wave applications. Concretely, ${\lambda}$/4 transmission line was added to Lange coupler for size reduction of RF/LO input, and mixed RF/LO signals were applied to gate of the FET of mixer. Active balun was used at output port for a coupling of out-of-phase IF output signals. According to measured results, the proposed downconverter MMIC showed good RF performances. For example, the downconverter MMIC showed an LO leakage power of -25 dBc at IF output port, and a RF-LO isolation of 18 dB. Therefore, off-chip components such as LO rejection filters were not required for a normal operation of the proposed downconverter MMIC. The proposed downconverter MMIC showed a conversion gain of 10.3 dB at RF frequency of 63 GHz. The size of the downconverter MMIC including all active and passive components was $2.2{\times}1.4mm^2$.

Investigation of Effective Contact Resistance of ZTO-Based Thin Film Transistors

  • Gang, Yu-Jin;Han, Dong-Seok;Park, Jae-Hyeong;Mun, Dae-Yong;Sin, So-Ra;Park, Jong-Wan
    • Proceedings of the Korean Vacuum Society Conference
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    • 한국진공학회 2013년도 제44회 동계 정기학술대회 초록집
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    • pp.543-543
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    • 2013
  • Thin-film transistors (TFTs) based on oxide semiconductors have been regarded as promising alternatives for conventional amorphous and polycrystalline silicon TFTs. Oxide TFTs have several advantages, such as low temperature processing, transparency and high field-effect mobility. Lots of oxide semiconductors for example ZnO, SnO2, In2O3, InZnO, ZnSnO, and InGaZnO etc. have been researched. Particularly, zinc-tin oxide (ZTO) is suitable for channel layer of oxide TFTs having a high mobility that Sn in ZTO can improve the carrier transport by overlapping orbital. However, some issues related to the ZTO TFT electrical performance still remain to be resolved, such as obtaining good electrical contact between source/drain (S/D) electrodes and active channel layer. In this study, the bottom-gate type ZTO TFTs with staggered structure were prepared. Thin films of ZTO (40 nm thick) were deposited by DC magnetron sputtering and performed at room temperature in an Ar atmosphere with an oxygen partial pressure of 10%. After annealing the thin films of ZTO at $400^{\circ}C$ or an hour, Cu, Mo, ITO and Ti electrodes were used for the S/D electrodes. Cu, Mo, ITO and Ti (200 nm thick) were also deposited by DC magnetron sputtering at room temperature. The channel layer and S/D electrodes were defined using a lift-off process which resulted in a fixed width W of 100 ${\mu}m$ and channel length L varied from 10 to 50 ${\mu}m$. The TFT source/drain series resistance, the intrinsic mobility (${\mu}i$), and intrinsic threshold voltage (Vi) were extracted by transmission line method (TLM) using a series of TFTs with different channel lengths. And the performances of ZTO TFTs were measured by using HP 4145B semiconductor analyzer. The results showed that the Cu S/D electrodes had a high intrinsic field effect mobility and a low effective contact resistance compared to other electrodes such as Mo, ITO and Ti.

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Telemetry System Encryption Technique using ARIA Encryption Algorithm (ARIA 암호 알고리즘을 이용한 원격측정 시스템 암호화 기법)

  • Choi, Seok-Hun;Lee, Nam-Sik;Kim, Bok-Ki
    • Journal of Advanced Navigation Technology
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    • 제24권2호
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    • pp.134-141
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    • 2020
  • Telemetry system is a communication system that measures and transmits various signals in the aircraft to the ground for collecting and monitoring flight data during the development of unmanned air vehicle and satellite launch vehicles. With the recent development of wireless communication technology, it is becoming important to apply encryption of telemetry system to prepare with security threats that may occur during flight data transmission. In this paper, we suggested and implemented the application method of ARIA-256, Korean standard encryption algorithm, to apply encryption to telemetry system. In consideration of the block error propagation and the telemetry frame characteristics, frame is encrypted using the CTR mode and can apply the Reed-solomon codes recommended by CCSDS. ARIA algorithm and cipher frame are implemented in FPGA, and simulation and hardware verification system confirmed continuous frames encryption.

Implementation of 40 Gb/s Network Processor of Wire-Speed Flow Management (40 Gb/s 실시간 플로우 관리 네트워크 프로세서 구현)

  • Doo, Kyeong-Hwan;Lee, Bhum-Cheol;Kim, Whan-Woo
    • The Journal of Korean Institute of Communications and Information Sciences
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    • 제37B권9호
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    • pp.814-821
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    • 2012
  • We propose a network processor called an OmniFlow processor capable of wire-speed flow management by a hardware-based flow admission control(FAC) in this paper. Because the OmniFlow processor can set up and release a wire-speed connection for flows, the update period of flows can be set to a short time, and only active flows can be effectively managed by terminating a flow that does not have a packet transmitted within this period. Therefore, the FAC can be used to provide a reliable transmission of UDP as well as TCP applications. This processor is fabricated in 65nm CMOS technology, and total gate count is 25 million. It has 40 Gb/s throughput performance in using the 32 RISC cores when maximum operating frequency is 555MHz.

Fatigue Life Prediction of Automotive Rubber Component Subjected to a Variable Amplitude Loading (가변진폭하중에서의 자동차 고무 부품의 피로 수명 예측)

  • Kim, Wan-Soo;Kim, Wan-Doo;Hong, Sung-In
    • Elastomers and Composites
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    • 제42권4호
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    • pp.209-216
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    • 2007
  • Fatigue life prediction methodology of the rubber component made of vulcanized natural rubber under variable amplitude loadings was studied. The displacement-controlled fatigue tests were conducted at different levels and the maximum Green-Lagrange strain was selected as damage parameters. A fatigue life curve of the rubber represented by the maximum Green-Lagrange strain was determined from the nonlinear finite element analysis. The transmission load history of SAE as variable amplitude loading was used to perform the fatigue life prediction. And then a signal processing of variable loading by racetrack and simplified rainflow cycle counting methods were performed. The modified miner's rule as cumulative damage summation was used. Finally, when the gate value is 30%, the predicted fatigue life of the rubber component agreed well with the experimental fatigue lives with a factor of two.

Controlled Synthesis of Hexagonal Boron Nitride on Cu Foil Using Chemical Vapor Deposition

  • Han, Jaehyun;Lee, Jun-Young;Kwon, Heemin;Yeo, Jong-Souk
    • Proceedings of the Korean Vacuum Society Conference
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    • 한국진공학회 2013년도 제44회 동계 정기학술대회 초록집
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    • pp.630-630
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    • 2013
  • Recently, atomically smooth hexagonal boron nitride(h-BN) known as a white graphene has drawn great attention since the discovery of graphene. h-BN is a III-V compound and has a honeycomb structure very similar to graphene with smaller lattice mismatch. Because of strong covalent sp2bonds like graphene, h-BN provides a high thermal conductivity and mechanical strength as well as chemical stability of h-BN superior to graphene. While graphene has a high electrical conductivity, h-BN has a highly dielectric property as an insulator with optical band gap up to 6eV. Similar to the graphene, h-BN can be applied to a variety of field, such as gate dielectric layers/substrate, ultraviolet emitter, transparent membrane, and protective coatings. However, up until recently, obtaining and controlling good quality monolayer h-BN layers have been too difficult and challenging. In this work, we investigate the controlled synthesis of h-BN layers according to the growth condition, time, temperature, and gas partial pressure. h-BN is obtained by using chemical vapor deposition on Cu foil with ammonia borane (BH3NH3) as a source for h-BN. Scanning Transmission Electron Microscopy (STEM, JEOL-JEM-ARM200F) is used for imaging and structural analysis of h-BN layer. Sample's surface morphology is characterized by Field emission scanning electron microscopy (SEM, JEOL JSM-7100F). h-BN is analyzed by Raman spectroscopy (HORIBA, ARAMIS) and its topographic variations by Atomic force microscopy (AFM, Park Systems XE-100).

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The Design of High-Speed, High-Resolution D/A Converter for Digital Image Signal Processing with Deglitching Current Cell (글리치 방지 전류원을 이용한 고속 고정밀 디지탈 영상 신호 처리용 D/A 변환기 설계)

  • Lee, Seong-Dae;Jeong, Gang-Min
    • The Transactions of the Korea Information Processing Society
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    • 제1권4호
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    • pp.469-478
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    • 1994
  • In this paper, a high speed, high resolution information processing digital- analog converter was designed for high definition color graphic, digital image signal processing, HDTV. For high speed operation, matrix type current cell array, latch which is not use pipelined, and two dimensional structure decoder using transmission gate were designed. It is adopted to fast-conversion, low-power implementation and exhibited high performance at linearity and accuracy. To reduce silicon area and to maintain resolution, current cell array composed of weighted and non-weighted current cells. In this paper, deglitching current cell design for high accuracy, new switching algorithm assert to reduce switching error. It's This circuit dissipates 130W with a 5-V power supply, and operate above 100MHz with 10 bit resolution.

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A Study on Characteristics Analysis of Time Sharing Type High Frequency Inverter Consisting of Three Unit Half-Bridge Serial Resonant Inverter (Half-Bridge 직렬 공진형 인버터를 단위인버터로 한 시분할방식 고주파 인버터의 특성해석에 관한 연구)

  • 조규판;원재선;서철식;배영호;김동희;노채균
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • 제15권1호
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    • pp.90-97
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    • 2001
  • A high frequency resonant inverter consisting of iliree unit Half-Bridge serial resommt inverter used as power source of induction heatmg at high frequency is presented in this paper. As a output [Dwer control strategy, sequencial time-sharing gate contml methcd is applied. This methcd is TDM(Time Division Multiplexing), which is broadly used with digital and analog signals transmission in communication system 1be analysis of the proposed circuit is generally described by using the normalized pararmenters. Also, the principle of basic operating and the its characteristics are estimated by the parameters such as switching frequency, load resistance. Also, according to the calculated characteristics value, a method of the circuit design and operating characteristics of the inverter is proposed. This paper proves the validity of theoretical analysis through the Pspice. This proposed inverter show that it can be practically used in future as power source system for induction heating application, DC-DC converter etc. r etc.

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Power Loss Modeling of Individual IGBT and Advanced Voltage Balancing Scheme for MMC in VSC-HVDC System

  • Son, Gum Tae;Lee, Soo Hyoung;Park, Jung-Wook
    • Journal of Electrical Engineering and Technology
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    • 제9권5호
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    • pp.1471-1481
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    • 2014
  • This paper presents the new power dissipation model of individual switching device in a high-level modular multilevel converter (MMC), which can be mostly used in voltage sourced converter (VSC) based high-voltage direct current (HVDC) system and flexible AC transmission system (FACTS). Also, the voltage balancing method based on sorting algorithm is newly proposed to advance the MMC functionalities by effectively adjusting switching variations of the sub-module (SM). The proposed power dissipation model does not fully calculate the average power dissipation for numerous switching devices in an arm module. Instead, it estimates the power dissipation of every switching element based on the inherent operational principle of SM in MMC. In other words, the power dissipation is computed in every single switching event by using the polynomial curve fitting model with minimum computational efforts and high accuracy, which are required to manage the large number of SMs. After estimating the value of power dissipation, the thermal condition of every switching element is considered in the case of external disturbance. Then, the arm modeling for high-level MMC and its control scheme is implemented with the electromagnetic transient simulation program. Finally, the case study for applying to the MMC based HVDC system is carried out to select the appropriate insulated-gate bipolar transistor (IGBT) module in a steady-state, as well as to estimate the proper thermal condition of every switching element in a transient state.