• ETRI Journal
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• v.18 no.4
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• pp.229-244
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• 1997

Realization of the economical, reliable, and efficient ATM interface block becomes an important key to development of the ATM switching system when we consider new issues raised recently. In this paper, we summarize requirements for the ATM interface block and present the UNI (User Network Interface)/NNI (Network Node Interface) architecture to meet these requirements. We also evaluate the performance of the multiplexer adopting the various multiplexing schemes and service disciplines. For ATM UNI/NNI interface technologies, we have developed a new policing device using the priority encoding scheme. It can reduce the decision time for policing significantly. We have also designed a new spacer that can space out the clumped cell stream almost perfectly. This algorithm guarantees more than 99 % conformance to the negotiated peak cell rate. Finally, we propose the interface architecture for accommodation of the ABR (Available Bit Rate) transfer capability. The proposed structure that performs virtual source and virtual destination functions as well as a switch algorithm can efficiently accommodate the ABR service.

• Proceedings of the KIEE Conference
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• 2008.10c
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• pp.123-125
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• 2008

This paper deals with output voltage characteristics analysis of outage and phase jump generator. As soon as the outage occurs the STS(Solid Transfer Switch)s are switched off. At the beginning of the outage the DG is required to limit the reverse current within the rated DG output current. In case of phase jump the DG output voltage phase should be adjusted with PLL. Simulation results show the output voltage characteristics of the generator.

• 제어로봇시스템학회:학술대회논문집
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• 2000.10a
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• pp.513-513
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• 2000

An integrable circuit technique for implementing high-speed analog two-input Max/Min circuit is described. The realization method is suitable for fabrication using CMOS technology. The proposed circuit comprises a current mirror and electronic switch connected with a absolute value circuit. The maximum or minimum operation of the proposed circuit can be selected by an external control voltage. The proposed analog Max/Min circuit has a very sharp transfer characteristic and is suitable for real-time systems. Simulation results verified the circuit performances are agreed with the expected values.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.02a
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• pp.13-13
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• 2011

Graphene based nano-electronic and nano-electromechanical devices will be introduced in this presentation. The first part of the presentation will be covered by our recent results on the fabrication and physical properties of artificially twisted bilayer graphene. Thanks to the recently developed contact transfer printing method, a single layer graphene sheet is stacked on various substrates/nano-structures in a controlled manner for fabricating e.g. a suspended graphene device, and single-bilayer hybrid junction. The Raman and electrical transport results of the artificially twisted bilayer indicates the decoupling of the two graphene sheets. The graphene based electromechanical devices will be presented in the second part of the presentation. Carbon nanotube based nanorelay and A new concept of non-volatile memory based on the carbon nanotube field effect transistor together with microelectromechanical switch will be briefly introduced at first. Recent progress on the graphene based nano structures of our group will be presented. The array of graphene resonators was fabricated and their mechanical resonance properties are discussed. A novel device structures using carbon nanotube field effect transistor combined with suspended graphene gate will be introduced in the end of this presentation.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.28B no.5
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• pp.411-420
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• 1991

In this paper, SPICE program which is widely used in analysis of general circuit on electronic and electrical field has been applied to DC-DC converter. We have selected Forward type which is widely used us SMPS(Switched Mode Power Supply) of various electronic equipments, and have confirmed the waveforms of circuit operation, transfer of energy and resetting in transformer. And the procedure which the output voltage of converter, including the control circuit, has been stabilized from the transient state to the steady state by controlling the duty ratio of switch is presented. We have compared SPICE simulation with experiment and have verified the validity of SPICE simulation.

• Proceedings of the Korean Information Science Society Conference
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• 2000.10c
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• pp.180-182
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• 2000

기존의 ATM(Asynchronous Transfer Mode) 스위치는 하나의 셀 안에 하나의 음성 데이터를 전송하는 방식이었다. 이러한 방식으로는 적은 양을 갖는 실시간 가변 비트율의 음성 데이터의 서비스를 제공하기에는 비효율적이었다. 이에 ATM 네트워크에서 사용자에게 실시간 가변 비트율로, 적은 양의 음성 데이터를 멀티플랙싱하여 하나의 ATM 셀의 유료부하에 실어 보내는 방식인 AAL2(ATM Adaptation Layer Type 2) 프로토콜의 표준화가 이루어졌다. AAL2 스위치 서버는 AAL2 프로토콜로 인코딩된 ATM 셀을 스위칭하기 위해서 개발되었다. AAL2 스위치 서버는 CPS(Common Part Sublayer) 패킷을 추출해내는 부분과 CPS 패킷의 식별자를 갖고 식별자 스위칭하는 부분, 그리고 스위칭이 끝난 식별자를 갖는 CPS 패킷을 ATM 셀로 만들어 ATM 네트워크를 통해서 전송하는 부분으로 나뉜다. AAL2 스위치 서버를 3개의 부분으로 나누는 이유는 셀을 전송받는 부분과, 식별자 스위칭하는 부분, 다시 셀을 전송하는 부분으로 나누어 병렬 처리를 함으로써 스위치의 성능을 향상시킨다. 이 논문에서는 AAL2 스위치 서버를 구현하고, 그 활용방안에 대해서 알아보도록 한다.

• Proceedings of the IEEK Conference
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• 2000.07a
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• pp.533-536
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• 2000

In this paper, we proposed high performance packet forwarding engine for asynchronous transfer mode(ATM) based gigabit routers. The forwarding engine is based on ATM switch and accommodates four 622Mbps ports. The forwarding engine has been designed to be able to process the Intemet protocol(IP) packet at 2.5Gbps using the pipelined If header processing and lookup control mechanism. For high performance packet forwarding, we used content addressable memory(CAM) based routing coprocessor operating in hardware and implemented the pipelined lookup control function into a field programmable gate array(FPGA). The pipelined packet header processing mechanism enhanced the forwarding performance of the If packets ingressed from four different 622Mbps ports. Moreover, the If lookup controller designed to have the performance up to 12.5Mpps. The proposed forwarding engine is also designed to support differentiated services(DS) and multiprotocol label switching(MPLS).

• 전기의세계
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• v.53 no.7
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• pp.18-18
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• 2004

수용가측의 전력품질에 대한 관심이 나날이 높아지고 있는 가운데 공장자동화, 및 컴퓨터의 보급확산으로 배전계통에 비선형 부하와 같은 악성부하들이 증가되고 있으며, 다른 한편으로는 공정제어기 및 인버터, 마이크로 프로세서와 같은 전력품질에 매우 민감한 부하기기들이 불특정 다수 분산적으로 도입ㆍ활용되고 있다. 이에 따라서 최근 전 세계적으로 전력품질에 의한 경제적 피해 사례가 보고되고 있어, 세계 선진국의 전력관련 산업체 및 연구소를 중심으로 한 전력품질 보상기기 개발에 대한 연구가 활발히 진행되고 있다. 이들에 대한 대표적인 기기들로서는 병렬형 전력품질 보상기기인 STATCOM(Static Compensator)과 직렬형 전력품질 보상기기인 DVR(Dynamic Voltage Restorer), 고속 전력 절체 스위치인 SSTS(Solid State Transfer Switch) 등을 열거할 수 있다. (중략)

• 전기의세계
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• v.53 no.7
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• pp.31-35
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• 2004

본 고에서는 현재 개발 및 필드테스트되고 있는 전력품질 보상기기인 STATCOM(Static Compensator), DVR(Dynamic Voltage Restorer), 고속전력절체스위치 SSTS(Solid State Transfer Switch)들이 국내 22.9kV급 배전계통에 도입되어 운용될 경우, 배전계통의 전력품질상의 외란, 즉 voltage sag, voltage swell, interruption등에 대해서도 부하기기가 문제없이 잘 동작할 수 있어야 하는 전력품질향상기기의 성능(전력품질향상기준)에 대한 평가방법 에 대하여 기술하고자 한다. 먼저, 전력품질향상기기인 DVR, D-STATCOM, SSTS들이 만족해야할 전력품질향상기준을 국내 전력 품질 실태를 고려하여 제시하고, 또한, 이들 전력품질향상기기에 대한 국내 배전계통적용에 적합한 성능평가방안을 제안/소개하기로 한다. (중략)

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.51 no.4
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• pp.186-192
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• 2002

In this paper, interleaved boost power factor corrector(IBPFC) is applied as a pre-regulator in switch mode power supply. IBPFC can reduce input current ripple and effectively increase the switching frequency without increasing the switching losses, because input current is divided each 50% by two switching devices. IBPFC can be classified as three cases by duty ratio condition in continuous current mode and be carried out state space average modeling. According to the modeling, steady and transient state analysis is performed by steady elements and perturbation element. Control transfer function is derived for design of control system.