• Title/Summary/Keyword: Transconductance amplifier

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W-Band MMIC chipset in 0.1-㎛ mHEMT technology

  • Lee, Jong-Min;Chang, Woo-Jin;Kang, Dong Min;Min, Byoung-Gue;Yoon, Hyung Sup;Chang, Sung-Jae;Jung, Hyun-Wook;Kim, Wansik;Jung, Jooyong;Kim, Jongpil;Seo, Mihui;Kim, Sosu
    • ETRI Journal
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    • v.42 no.4
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    • pp.549-561
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    • 2020
  • We developed a 0.1-㎛ metamorphic high electron mobility transistor and fabricated a W-band monolithic microwave integrated circuit chipset with our in-house technology to verify the performance and usability of the developed technology. The DC characteristics were a drain current density of 747 mA/mm and a maximum transconductance of 1.354 S/mm; the RF characteristics were a cutoff frequency of 210 GHz and a maximum oscillation frequency of 252 GHz. A frequency multiplier was developed to increase the frequency of the input signal. The fabricated multiplier showed high output values (more than 0 dBm) in the 94 GHz-108 GHz band and achieved excellent spurious suppression. A low-noise amplifier (LNA) with a four-stage single-ended architecture using a common-source stage was also developed. This LNA achieved a gain of 20 dB in a band between 83 GHz and 110 GHz and a noise figure lower than 3.8 dB with a frequency of 94 GHz. A W-band image-rejection mixer (IRM) with an external off-chip coupler was also designed. The IRM provided a conversion gain of 13 dB-17 dB for RF frequencies of 80 GHz-110 GHz and image-rejection ratios of 17 dB-19 dB for RF frequencies of 93 GHz-100 GHz.

Design of A 10MHz Bandpass Filter Using Grounding and Floating CDTA Active Inductors (그라운딩과 폴로팅 CDTA 능동인덕터를 사용한 10MHz 대역통과필터 설계)

  • Bang, Junho;Ryu, In-Ho
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.15 no.11
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    • pp.6804-6809
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    • 2014
  • This paper presents a bandpass filter using a current differencing transconductance amplifier (CDTA)s for application to low-voltage and low-power analog signal processing systems. The presented filter employs grounding and floating active inductors, which are composed of two or three CDTAs, and is capable of realizing all the standard functions of the filter without requiring any component matching criteria or extra active components. The HSPICE simulation result of the designed active bandpass filter showed that it had a 10MHz center frequency with -2.5dB attenuated bandwidth from 9.5 MHz to 10.5 MHz, and -50dB from 8 MHz to 17 MHz.

Micromachined ZnO Piezoelectric Pressure Sensor and Pyroelectric Infrared Detector in GaAs

  • Park, Jun-Rim;Park, Pyung
    • Journal of Electrical Engineering and information Science
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    • v.3 no.2
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    • pp.239-244
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    • 1998
  • Piezoelectric pressure sensors and pyroelectric infrared detectors based on ZnO thin film have been integrated with GaAs metal-semiconductor field effect transistor (MESFET) amplifiers. Surface micromachining techniques have been applied in a GaAs MESFET process to form both microsensors and electronic circuits. The on-chip integration of microsensors such as pressure sensors and infrared detectors with GaAs integrated circuits is attractive because of the higher operating temperature up to 200 oC for GaAs devices compared to 125 oC for silicon devices and radiation hardness for infrared imaging applications. The microsensors incorporate a 1${\mu}$m-thick sputtered ZnO capacitor supported by a 2${\mu}$m-thick aluminum membrane formed on a semi-insulating GaAs substrate. The piezoelectric pressure sensor of an area 80${\times}$80 ${\mu}$m2 designed for use as a miniature microphone exhibits 2.99${\mu}$V/${\mu}$ bar sensitivity at 400Hz. The voltage responsivity and the detectivity of a single infrared detector of an area 80${\times}$80 $\mu\textrm{m}$2 is 700 V/W and 6${\times}$108cm$.$ Hz/W at 10Hz respectively, and the time constant of the sensor with the amplifying circuit is 53 ms. Circuits using 4${\mu}$m-gate GaAs MESFETs are fabricated in planar, direct ion-implanted process. The measured transconductance of a 4${\mu}$m-gate GaAs MESFET is 25.6 mS/mm and 12.4 mS/mm at 27 oC and 200oC, respectively. A differential amplifier whose voltage gain in 33.7 dB using 4${\mu}$m gate GaAs MESFETs is fabricated for high selectivity to the physical variable being sensed.

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Design of an OTA Improving Linearity with a Mobility Compensation Technique (이동도 보상 회로를 이용한 OTA의 선형성 개선)

  • 김규호;양성현;김용환;조경록
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.40 no.12
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    • pp.46-53
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    • 2003
  • This paper describes a new linear operational transconductance amplifier (OTA) and its application to the 9th-order Bessel filter. To improve the linearity of the OTA, we employ a mobility compensation technique. The combination of the triode and the subthreshold region transistors can compensate the mobility reduction effect and make the OTA with a good linearity. The proposed OTA shows $\pm$0.32% Gm variation over the input range of $\pm$0.8-V. The total harmonic distortion (THD) was lower than -60-㏈. The 9th-order Bessel filter has been designed using a 0.35-${\mu}{\textrm}{m}$ n-well CMOS process under 3.3-V supply voltage. It shows the cutoff frequency of 8-MHz and the power consumption of 65-mW.

Large Signal Unified Model for GaAs pHEMT using Modified Curtice Model (새롭게 수정된 Curtice 모델을 이용한 GaAs pHEMT 대신호 통합모델 구축)

  • 박덕종;염경환;장동필;이재현
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.12 no.4
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    • pp.551-561
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    • 2001
  • In this paper, the large signal unified model is established for H4O GaAs pHEMT of GEC-Marconi using modified Curtice model. This unified model includes DC characteristic, small signal, and noise characteristic as various bias. Particularly, the model can simply and physically explain trans-conductance $(g_m)$ of pHEMT using modified Curtice model, and can tell the difference $g_m$, $R_ds$ at DC and these at AC through inclusion of internal RF-choke. The results of the established model built up using SDD in HP-Eessof show good agreement to the S/W measured data in DC, small signal, and noise characteristic. This model can also be applied to various computer aided analysis, such as linear simulation, 1-tone harmonic balance simulation, and multi-tone harmonic balance simulation, so the LNA(Low Noise Amplifier), oscillator, and mixer design has been shown using this model library.

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Design of Variable Gain Receiver Front-end with Wide Gain Variable Range and Low Power Consumption for 5.25 GHz (5.25 GHz에서 넓은 이득 제어 범위를 갖는 저전력 가변 이득 프론트-엔드 설계)

  • Ahn, Young-Bin;Jeong, Ji-Chai
    • Journal of IKEEE
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    • v.14 no.4
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    • pp.257-262
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    • 2010
  • We design a CMOS front-end with wide variable gain and low power consumption for 5.25 GHz band. To obtain wide variable gain range, a p-type metal-oxide-semiconductor field-effect transistor (PMOS FET) in the low noise amplifier (LNA) section is connected in parallel. For a mixer, single balanced and folded structure is employed for low power consumption. Using this structure, the bias currents of the transconductance and switching stages in the mixer can be separated without using current bleeding path. The proposed front-end has a maximum gain of 33.2 dB with a variable gain range of 17 dB. The noise figure and third-order input intercept point (IIP3) are 4.8 dB and -8.5 dBm, respectively. For this operation, the proposed front-end consumes 7.1 mW at high gain mode, and 2.6 mW at low gain mode. The simulation results are performed using Cadence RF spectre with the Taiwan Semiconductor Manufacturing Company (TSMC) $0.18\;{\mu}m$ CMOS technology.)

Design of Low Dropout Regulator using self-cascode structure (셀프-캐스코드 구조를 적용한 LDO 레귤레이터 설계)

  • Choi, Seong-Yeol;Kim, Yeong-Seuk
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.22 no.7
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    • pp.993-1000
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    • 2018
  • This paper proposes a low-dropout voltage regulator(LDO) using self-cascode structure. The self-cascode structure was optimized by adjusting the channel length of the source-side MOSFET and applying a forward voltage to the body of the drain-side MOSFET. The self-cascode of the input differential stage of the error amplifier is optimized to give higher transconductance, but the self-cascode of the output stage is optimized to give higher output resistance, The proposed LDO using self-cascode structure was designed by a $0.18{\mu}m$ CMOS technology and simulated using SPECTRE. The load regulation of the proposed LDO regulator was 0.03V/A, whereas that of the conventional LDO was 0.29V/A. The line regulation of the proposed LDO regulator was 2.23mV/V, which is approximately three times improvement compared to that of the conventional LDO. The transient response of the proposed LDO regulator was 625ns, which is 346ns faster than that of the conventional LDO.

Fabrication and characterization of the 0.25 ${\mu}m$ T-shaped gate P-HEMT and its application for MMIC low noise amplifier (0.25 ${\mu}m$ T형 게이트 P-HEMT 제작 및 특성 평가와 MMIC 저잡음 증폭기에 응용)

  • Kim, Byung-Gyu;Kim, Young-Jin;Jeong, Yoon-Ha
    • Journal of the Korean Institute of Telematics and Electronics D
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    • v.36D no.1
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    • pp.38-46
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    • 1999
  • o.25${\mu}m$ T-shaped gate P-HEMT is fabricated and used for design of X0band three stage monolithic microwave integrated circuit(MMIC) low noise amplifier(LNA). The fabricated P-HEMT exhibits an extrinsis transconductance of 400mS/mm and a drain current of 400mA/mm. The RF and noise characteristics show that the current gain cut off frequency is 65GHz and minimum noise figure(NFmin) of 0.7dB with an associated gain of 14.8dB at 9GHz. In the design of the three stage LNA, we have used the inductive series feedback circuit topology with the short stub. The effects of series feedback to the noise figure, the gain, and the stability have been investigated to find the optimal short stub length. The designed three staage LNA showed a gain of above 33dB, a noise figure of under 1.2dB, and ainput/output return loss of under 15dB and 14dB, respectively. The results show that the fabricated P-HEMT is very suitable for a X-band LNA with high gain.

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Design of a Fully Integrated Low Power CMOS RF Tuner Chip for Band-III T-DMB/DAB Mobile TV Applications (Band-III T-DMB/DAB 모바일 TV용 저전력 CMOS RF 튜너 칩 설계)

  • Kim, Seong-Do;Oh, Seung-Hyeub
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.21 no.4
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    • pp.443-451
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    • 2010
  • This paper describes a fully integrated CMOS low-IF mobile-TV RF tuner for Band-III T-DMB/DAB applications. All functional blocks such as low noise amplifier, mixers, variable gain amplifiers, channel filter, phase locked loop, voltage controlled oscillator and PLL loop filter are integrated. The gain of LNA can be controlled from -10 dB to +15 dB with 4-step resolutions. This provides a high signal-to-noise ratio and high linearity performance at a certain power level of RF input because LNA has a small gain variance. For further improving the linearity and noise performance we have proposed the RF VGA exploiting Schmoock's technique and the mixer with current bleeding, which injects directly the charges to the transconductance stage. The chip is fabricated in a 0.18 um mixed signal CMOS process. The measured gain range of the receiver is -25~+88 dB, the overall noise figure(NF) is 4.02~5.13 dB over the whole T-DMB band of 174~240 MHz, and the measured IIP3 is +2.3 dBm at low gain mode. The tuner rejects the image signal over maximum 63.4 dB. The power consumption is 54 mW at 1.8 V supply voltage. The chip area is $3.0{\times}2.5mm^2$.